Mitsubishi Electric MELSEC Q Series User Manual page 152

Programmable controller multiple cpu system
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(1) Host CPU operation information area
(a) Information stored in the host CPU operation information area
The following information is stored in the host CPU operation infomation area in the multiple CPU system.
These will all remain as 0 and will not change in the case of single CPU system.
CPU
shared
Name
memory
address
Information
0
H
availability
1
Diagnostic error
H
2
H
Time the
3
diagnostic error
H
occurred
4
H
Error information
5
H
identification code
6
H
Common error
to
information
10
H
11
H
Individual error
to
information
1B
H
1C
Empty
H
1D
Switch status
H
1E
LED status
H
CPU operation
1F
H
status
(b) Reading of host CPU operation information area
Other QCPU can use FROM instruction or multiple CPU area device (U3En\G ) to read data from the host
CPU operation information area of the host CPU.
However, because there is a delay in data updating, use the read data for monitoring purposes.
*1:
For the Motion CPU, 5
operation information area is read from the Motion CPU, it will be read as "0."
*2:
For details, refer to the section describing the corresponding special register in the User's Manual (Function Explanation,
Program Fundamentals) for the CPU module used.
Table4.2 List of host CPU operation information areas
Detail
The area to confirm if information is stored in the host CPU's
operation information area (1
Information
• 0: Information not stored in the host CPU's operation
availability flag
information area
• 1: Information stored in the host CPU's operation information
area
Diagnostic error
An error No. identified during diagnostics is stored in BIN.
number
The year and month that the error number was stored in the CPU
shared memory's 1
code.
The day and time that the error number was stored in the CPU
Time the diagnosis
shared memory's 1
error occurred
code.
The minutes and seconds that the error number was stored in the
CPU shared memory's 1
BCD code.
Stores an identification code to determine what error information
Error information
has been stored in the common error information and individual
identification code
error information.
Common error
The common information corresponding to the error number
information
identified during diagnostic is stored.
Individual error
The individual information corresponding to the error number
information
identified during diagnostic is stored.
----
Cannot be used
CPU switch status
Stores the CPU module switch status.
CPU-LED status
Stores the CPU module's LED bit pattern.
CPU operation
Stores the CPU module's operation status.
status
to 1C
of the host CPU's operation information area is not used. If 5
H
H
CHAPTER4 COMMUNICATIONS BETWEEN CPU MODULES
*2
Description
to 1F
,) or not.
H
H
address is stored with two digits of the BCD
H
address is stored with two digits of the BCD
H
address is stored with two digits of the
H
*1
Correspo
nding
special
register
----
SD0
SD1
SD2
SD3
SD4
SD5
to
SD15
SD16
to
SD26
----
SD200
SD201
SD203
to 1C
of the host CPU's
H
H
4 - 6
1
2
3
4
5
6
7
8

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