Mitsubishi Electric MELSEC Q Series User Manual page 150

The CPU shared memory configuration and the availability of the communication from the host CPU using the
CPU shared memory by program are shown in Figure 4.1 to Figure 4.3.
• For Basic model QCPU
CPU shared memory
(0 ) 0
H
to to
Host CPU operation
information area
(5F ) 95
H
(60 ) 96
H
to to
Restricted system area
(BF ) 191
H
(C0 ) 192
H
Auto refresh area
to to
User setting area
(1FF ) 511
H
*1: Restricted system area is used for communicating with instructions dedicated to
Motion CPU.
Refer to the programming manual of Motion CPU for applications and usage methods
of restricted system area used with instructions dedicated to Motion CPU.
Figure 4.1 Configuration of CPU shared memory
• For High Performance model QCPU or Process CPU
CPU shared memory
(0 ) 0
H
Host CPU operation
to to
information area
( 1FF ) 511
H
( 200 ) 512
H
to to Restricted system area
( 7FF ) 2047
H
( 800 ) 2048
H
Auto refresh area
to to
User setting area
(FFF ) 4095
H
*1: Restricted system area is used for communicating with instructions dedicated to
Motion CPU.
Refer to the programming manual of Motion CPU for applications and usage methods
of restricted system area used with instructions dedicated to Motion CPU.
Figure 4.2 Configuration of CPU shared memory
CHAPTER4 COMMUNICATIONS BETWEEN CPU MODULES
Host CPU
Write Read
: Communication allowed, : Communication not allowed
Host CPU
Write Read
: Communication allowed, : Communication not allowed
Other CPUs
Write Read
*1
Other CPUs
Write Read
*1
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