Mitsubishi Electric MELSEC Q Series User Manual page 185

2) Using user setting aera in multiple CPU high speed transmission area
The data written to the multiple CPU high speed transmission area of the CPU shared memory of the host
CPU by the write instruction is sent to the other CPU in a certain cycle.
The other CPU reads the receive data from the multiple CPU high speed transmission area of the CPU
shared memory by the read instruction.
The other CPU can read the data of the multiple CPU high speed transmission area of the CPU shared
memory at the execution of the instruction, which is different from the auto refresh of the CPU shared
memory.
The figure 4.10 shows the outline of operation where the data written to the CPU shared memory of the CPU
No.1 using the write instruction is read by the CPU No.2 using the read instruction.
CPU No.1
CPU shared memory
Multiple CPU high speed transmission
area of CPU No.1
User setting area
Multiple CPU high speed transmission
area of CPU No.1
User setting area
1) Writing with write instruction
Sequence program
Execution of write instruction
Procedure for the CPU No.2 to read device data of the CPU No.1
1) Writes data in the user free area of the multiple CPU high speed transmission area of the CPU No.1 by the
write instruction.
2) Sends the data in the multiple CPU high speed transmission area of the CPU No.1 to that of the CPU No.2.
3) Reads the data in the user setting area of the CPU No. 1 to the specified device from the multiple CPU high
speed transmission area of the host CPU by the read instruction.
For the write/read instruction, refer to Section 4.1.4(1).
●
For the Motion CPU, the write/read instructions cannot be used.
For the method to access from the Motion CPU to the multiple CPU high speed transmission area of the CPU shared
memory, refer to the manual for the Motion CPU.
●
The delay time of data transfer with programs using user setting area in multiple CPU high speed transmission area is
from 0.09 ms to 1.80 ms.
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2) Data transmission to
CPU No.2
Figure 4.41 Outline of communication by the program
CPU No.2
CPU shared memory
Multiple CPU high speed transmission
area of CPU No.1
User setting area
Multiple CPU high speed transmission
area of CPU No.2
User setting area
3) Reading with read instruction
Sequence program
Execution of read instruction