Intel BX80605I7870 - Core i7 2.93 GHz Processor Datasheet page 96

2.13.9 MC_RANK_VIRTUAL_TEMP0
MC_RANK_VIRTUAL_TEMP1
MC_RANK_VIRTUAL_TEMP2
This register contains the 8 most significant bits [37:30] of the virtual temperature of
each rank. The difference between the virtual temperature and the sensor temperature
can be used to determine how fast fan speed should be increased. The value stored is
right shifted one bit to the right with respect to the corresponding MC_Throttle_Offset
register value. For example when When a rank throttle offset is set to 40h, the value
read from the corresponding in MC_RANK_VIRTUAL_TEMP register is 20h.
When there are more than 4 ranks attached to the channel, the thermal throttle logic is
shared.
Device:
Function: 3
Offset:
Access as a Dword
Bit
31:24
23:16
15:8
7:0
2.13.10 MC_DDR_THERM_COMMAND0
MC_DDR_THERM_COMMAND1
MC_DDR_THERM_COMMAND2
This register contains the command portion of the DDR_THERM# functionality as
described in the processor datasheet (i.e., what an assertion of the pin does).
Device:
Function: 3
Offset:
Access as a Dword
Bit
3
2
1
0
96
4, 5, 6
98h
Reset
Type
Value
RO 0
RANK3. Rank 3 virtual temperature.
RO 0 RANK2. Rank 2 virtual temperature.
RO 0 RANK1. Rank 1 virtual temperature.
RO 0 RANK0. Rank 0 virtual temperature.
4, 5, 6
9Ch
Reset
Type
Value
THROTTLE.
RW 0
Force throttling when DDR_THERM# pin is asserted.
RW 0 Reserved
DISABLE_EXTTS.
RW 0
Response to DDR_THERM# pin is disabled. ASSERTION and DEASSERTION
fields in the register MC_DDR_THERM_STATUS are frozen.
LOCK.
RW 0
When set, all bits in this register are RO and cannot be written.
Register Description
Description
Description
Datasheet