I/O PORTS
9-6
External Interrupt Pending Register (EXTIPND)
F7H, Set 1, Bank 0, R/W
MSB
.7
.6
.5
P1.7
P1.6
P1.5
(INT7)
(INT6)
(INT5)
EXTIPND bit configuration settings:
0
No interrupt pending (when read), clear pending bit (when write)
1
Interrupt is pending (when read)
Figure 9-6. External Interrupt Pending Register (EXTIPND)
S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
.4
.3
.2
.1
P1.4
P1.3
P0.2
P0.1
(INT4)
(INT3)
(INT2)
(INT1)
.0
LSB
P0.0
(INT0)