Set 1 Registers; Overview - Samsung S3C8275X User Manual

S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
4
CONTROL REGISTERS

OVERVIEW

In this chapter, detailed descriptions of the S3C8275X/C8278X/C8274X control registers are presented in an
easy-to-read format. You can use this chapter as a quick-reference source when writing application programs.
Figure 4-1 illustrates the important features of the standard register description format.
Control register descriptions are arranged in alphabetical order according to register mnemonic. More detailed
information about control registers is presented in the context of the specific peripheral hardware descriptions in
Part II of this manual.
Data and counter registers are not described in detail in this reference chapter. More information about all of the
registers used by a specific peripheral is presented in the corresponding peripheral descriptions in Part II of this
manual.
The locations and read/write characteristics of all mapped registers in the S3C8275X/C8278X/C8274X register
file are listed in Table 4-1. The hardware reset value for each mapped register is described in Chapter 8, "RESET
and Power-Down."
Register Name
Basic timer control register
System clock control register
System flags register
Register pointer 0
Register pointer 1
Stack pointer (high byte)
Stack pointer (low byte)
Instruction pointer (high byte)
Instruction pointer (low byte)
Interrupt request register
Interrupt mask register
System mode register
Register page pointer
Table 4-1. Set 1 Registers
Mnemonic
Locations D0H – D2H are not mapped.
BTCON
CLKCON
FLAGS
RP0
RP1
SPH
SPL
IPH
IPL
IRQ
IMR
SYM
PP
Address
Decimal Hex
211 D3H
212 D4H
213 D5H
214 D6H
215 D7H
216 D8H
217 D9H
218 DAH
219 DBH
220 DCH
221 DDH
222 DEH
223 DFH
CONTROL REGISTER
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
4-1