Table of Contents
Advertisement
S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
°
= − 25
(T
C to + 85
A
Parameter
SCK cycle time
SCK high, low width
SI setup time to SCK high
SI hold time to SCK high
Output delay for SCK to SO
Interrupt input, High, Low width
nRESET input Low width
External
Interrupt
Table 17-5. A.C. Electrical Characteristics
°
C, V
= 2.0 V to 3.6 V)
DD
Symbol
t
KCY
t
, t
KH
KL
t
SIK
t
KSI
t
KSO
t
,
INTH
t
INTL
t
RSL
t
INTL
NOTE:
The unit t
Figure 17-3. Input Timing for External Interrupts
Conditions
External SCK source
Internal SCK source
External SCK source
Internal SCK source
External SCK source
Internal SCK source
External SCK source
Internal SCK source
External SCK source
Internal SCK source
All interrupt
V
= 3 V
DD
Input
V
= 3 V
DD
t
INTH
0.8 V
DD
0.2 V
DD
means one CPU clock period.
CPU
ELECTRICAL DATA
Min
Typ
−
1,000
1,000
500
t
/2−50
KCY
250
250
400
400
−
−
500
700
−
10
Max
Unit
−
ns
300
ns
250
−
ns
−
µs
17-7
Advertisement
Table of Contents
