Samsung C8278X Manuals

Manuals and User Guides for Samsung C8278X. We have 1 Samsung C8278X manual available for free PDF download: User Manual

Samsung C8278X User Manual

Samsung C8278X User Manual (324 pages)

8-BIT CMOS MICROCONTROLLERS

Brand: Samsung | Category: Microcontrollers | Size: 2.68 MB

Table of Contents

Important Notice
2
April
3
Revision History
4
Electrical Data
5
Table of Contents
8
Chapter 1 Product Overview

23
- S3C8-Series Microcontrollers
  23
- S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X Microcontroller
  23
- Flash
  23
- Features
  24
- Block Diagram
  25
- Pin Assignment
  26
- Pin Descriptions
  28
- S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X Pin Descriptions
  28
- Pin Circuits
  30
- Pin Circuit Type a
  30
- Pin Circuit Type B (Nreset)
  30
- Pin Circuit Type E-4 (P0, P1)
  30
- Pin Circuit Type H-4
  31
- Pin Circuit Type H-8 (P2.1–P2.7, P3)
  31
- Pin Circuit Type H-9 (P4, P5, P6)
  32
- Pin Circuit Type H-10 (P2.0)
  33
Chapter 2 Address Spaces

34
Chapter 3 Addressing Modes

57
- Overview
  57
- Register Addressing Mode (R)
  58
- Working Register Addressing
  58
- Indirect Register Addressing Mode (IR)
  59
- Indirect Register Addressing to Register File
  59
- Indirect Register Addressing to Program Memory
  60
- Indirect Working Register Addressing to Register File
  61
- Indirect Working Register Addressing to Program or Data Memory
  62
- Indexed Addressing Mode (X)
  63
- Indexed Addressing to Register File
  63
- Indexed Addressing to Program or Data Memory with Short Offset
  64
- Indexed Addressing to Program or Data Memory
  65
- Direct Address Mode (DA)
  66
- Direct Addressing for Load Instructions
  66
- Direct Addressing for Call and Jump Instructions
  67
- Indirect Address Mode (IA)
  68
- Indirect Addressing
  68
- Relative Address Mode (RA)
  69
- Relative Addressing
  69
- Immediate Mode (IM)
  70
- Immediate Addressing
  70
- Set 1 Registers
  71
- Overview
  71
- Set 1, Bank 0 Registers
  72
- Set 1, Bank 1 Registers
  73
- Register Description Format
  74
- BLDCON Battery Level Detector Control Register
  75
- BTCON Basic Timer Control Register
  76
- CLKCON System Clock Control Register
  77
- CLOCON Clock Output Control Register
  78
- FLAGS System Flags Register
  82
- FMCON Flash Memory Control Register
  83
- FMSECH Flash Memory Sector Address Register (High Byte)
  84
- FMSECL Flash Memory Sector Address Register (Low Byte)
  84
- FMUSR Flash Memory User Programming Enable Register
  85
- IMR Interrupt Mask Register
  86
- IPH Instruction Pointer (High Byte)
  87
- IPL Instruction Pointer (Low Byte)
  87
- IPR Interrupt Priority Register
  88
- IRQ Interrupt Request Register
  89
- LCON LCD Control Register
  90
- OSCCON Oscillator Control Register
  91
- P0CONH Port 0 Control Register (High Byte)
  92
- P0CONL Port 0 Control Register (Low Byte)
  93
- P0PUR Port 0 Pull-Up Control Register
  94
- P1CONH Port 1 Control Register (High Byte)
  95
- P1CONL Port 1 Control Register (Low Byte)
  96
- P1PUR Port 1 Pull-Up Control Register
  97
- P2CONH Port 2 Control Register (High Byte)
  98
- P2CONL Port 2 Control Register (Low Byte)
  99
- P2PUR Port 2 Pull-Up Control Register
  100
- P3CONH Port 3 Control Register (High Byte)
  101
- P3CONL Port 3 Control Register (Low Byte)
  102
- P3PUR Port 3 Pull-Up Control Register
  103
- P4CONH Port 4 Control Register (High Byte)
  104
- P4CONL Port 4 Control Register (Low Byte)
  105
- P5CONH Port 5 Control Register (High Byte)
  106
- P5CONL Port 5 Control Register (Low Byte)
  107
- P6CON Port 6 Control Register
  108
- PP Register Page Pointer
  109
- RP0 Register Pointer 0
  110
- RP1 Register Pointer 1
  110
- SIOCON SIO Control Register
  111
- SPH Stack Pointer (High Byte)
  112
- SPL Stack Pointer (Low Byte)
  112
- STPCON Stop Control Register
  113
- SYM System Mode Register
  114
- TACON Timer 1/A Control Register
  115
- TBCON Timer B Control Register
  116
- WTCON Watch Timer Control Register
  117
- Overview
  118
- Interrupt Types
  119
- S3C8-Series Interrupt Types
  119
- S3C8275X/C8278X/C8274X Interrupt Structure
  120
- Interrupt Vector Addresses
  121
- ROM Vector Address Area
  121
- Interrupt Vectors
  122
- Enable/Disable Interrupt Instructions (EI, DI)
  123
- System-Level Interrupt Control Registers
  123
- Interrupt Control Register Overview
  123
- Interrupt Processing Control Points
  124
- Interrupt Function Diagram
  124
- Peripheral Interrupt Control Registers
  125
- Interrupt Source Control and Data Registers
  125
- System Mode Register (SYM)
  126
- Interrupt Mask Register (IMR)
  127
- Interrupt Priority Register (IPR)
  128
- Interrupt Request Priority Groups
  128
- Interrupt Priority Register (IPR)
  129
- Interrupt Request Register (IRQ)
  130
- Interrupt Pending Function Types
  131
- How to Clear an Interrupt Pending Bit
  131
- Interrupt Source Polling Sequence
  132
- Interrupt Service Routines
  132
- Generating Interrupt Vector Addresses
  133
- Nesting of Vectored Interrupts
  133
- Instruction Pointer (IP)
  133
- Fast Interrupt Processing
  133
- Data Types
  135
- Overview
  135
- Register Addressing
  135
- Addressing Modes
  135
- Instruction Group Summary
  136
- Flags Register (FLAGS)
  140
- System Flags Register (FLAGS)
  140
- Flag Descriptions
  141
- Instruction Set Notation
  142
- Flag Notation Conventions
  142
- Instruction Set Symbols
  142
- Instruction Notation Conventions
  143
- Opcode Quick Reference
  144
- Condition Codes
  146
- Instruction Descriptions
  147
- ADC Add with Carry
  148
- ADD Add
  149
- AND Logical and
  150
- BAND Bit and
  151
- BCP Bit Compare
  152
- BITC Bit Complement
  153
- BITR Bit Reset
  154
- BITS Bit Set
  155
- BOR Bit or
  156
- BTJRF Bit Test, Jump Relative on False
  157
- BTJRT Bit Test, Jump Relative on True
  158
- BXOR Bit XOR
  159
- CALL Call Procedure
  160
- CCF Complement Carry Flag
  161
- CLR Clear
  162
- COM Complement
  163
- CP Compare
  164
- CPIJE Compare, Increment, and Jump on Equal
  165
- CPIJNE Compare, Increment, and Jump on Non-Equal
  166
- DA Decimal Adjust
  167
- DEC Decrement
  169
- DECW Decrement Word
  170
- DI Disable Interrupts
  171
- DIV Divide (Unsigned)
  172
- DJNZ Decrement and Jump if Non-Zero
  173
- EI Enable Interrupts
  174
- ENTER Enter
  175
- EXIT Exit
  176
- IDLE Idle Operation
  177
- INC Increment
  178
- INCW Increment Word
  179
- IRET Interrupt Return
  180
- JP Jump
  181
- JR Jump Relative
  182
- LD Load
  183
- LDB Load Bit
  185
- LDC/LDE Load Memory
  186
- LDCD/LDED Load Memory and Decrement
  188
- LDCI/LDEI Load Memory and Increment
  189
- LDCPI/LDEPI Load Memory with Pre-Increment
  191
- LDW Load Word
  192
- MULT Multiply (Unsigned)
  193
- NEXT Next
  194
- NOP no Operation
  195
- OR Logical or
  196
- POP Pop from Stack
  197
- POPUD Pop User Stack (Decrementing)
  198
- POPUI Pop User Stack (Incrementing)
  199
- PUSH Push to Stack
  200
- PUSHUD Push User Stack (Decrementing)
  201
- PUSHUI Push User Stack (Incrementing)
  202
- RCF Reset Carry Flag
  203
- RET Return
  204
- RL Rotate Left
  205
- RLC Rotate Left through Carry
  206
- RR Rotate Right
  207
- RRC Rotate Right through Carry
  208
- SB0 Select Bank 0
  209
- SB1 Select Bank 1
  210
- SBC Subtract with Carry
  211
- SCF Set Carry Flag
  212
- SRA Shift Right Arithmetic
  213
- Srp/Srp0/Srp1
  214
- Set Register Pointer
  214
- STOP Stop Operation
  215
- SUB Subtract
  216
- SWAP Swap Nibbles
  217
- TCM Test Complement under Mask
  218
- TM Test under Mask
  219
- WFI Wait for Interrupt
  220
- XOR Logical Exclusive or
  221
- System Clock Circuit
  222
- Overview
  222
- Main Oscillator Circuits
  223
- Sub Oscillator Circuits
  223
- Crystal/Ceramic Oscillator (Fx)
  223
- RC Oscillator (Fx)
  223
- Crystal Oscillator (Fxt)
  223
- External Oscillator (Fxt)
  223
- Clock Status During Power-Down Modes
  224
- System Clock Circuit Diagram
  224
- System Clock Control Register (CLKCON)
  225
- Clock Output Control Register (CLOCON)
  226
- Clock Output Block Diagram
  226
- Oscillator Control Register (OSCCON)
  227
- Switching the CPU Clock
  228
- STOP Control Register (STPCON)
  229
- System Reset
  230
- Overview
  230
- Normal Mode Reset Operation
  230
- Hardware Reset Values
  231
- S3C8275X/C8278X/C8274X Set 1 Register and Values after RESET
  231
- S3C8275X/C8278X/C8274X Set 1, Bank 0 Register Values after RESET
  232
- S3C8275X/C8278X/C8274X Set 1, Bank 1 Register Values after RESET
  233
- Power-Down Modes
  234
- Stop Mode
  234
- Idle Mode
  235
- S3C8275X/C8278X/C8274X Port Configuration Overview
  236
- Port Data Registers
  237
- S3C8275X/C8278X/C8274X I/O Port Data Register Format
  237
- Port Data Register Summary
  237
- Port
  238
- Port 0 High-Byte Control Register (P0CONH)
  239
- Port 0 Low-Byte Control Register (P0CONL)
  239
- Port 0 Pull-Up Control Register (P0PUR)
  240
- External Interrupt Control Register, Low Byte (EXTICONL)
  240
- External Interrupt Pending Register (EXTIPND)
  241
- Port
  242
- Port 1 High-Byte Control Register (P1CONH)
  243
- Port 1 Low-Byte Control Register (P1CONL)
  243
- Port 1 Pull-Up Control Register (P1PUR)
  244
- External Interrupt Control Register, High Byte (EXTICONH)
  244
- External Interrupt Control Register, Low Byte (EXTICONL)
  245
- External Interrupt Pending Register (EXTIPND)
  245
- Port 2 High-Byte Control Register (P2CONH)
  246
- Port 2 Low-Byte Control Register (P2CONL)
  247
- Port 2 Pull-Up Control Register (P2PUR)
  247
- Port 3 High Byte Control Register (P3CONH)
  248
- Port 3 Low Byte Control Register (P3CONL)
  249
- Port 3 Pull-Up Control Register (P3PUR)
  249
- Port 4 High-Byte Control Register (P4CONH)
  250
- Port 4 Low-Byte Control Register (P4CONL)
  251
- Port 5 High-Byte Control Register (P5CONH)
  252
- Port 5 Low-Byte Control Register (P5CONL)
  253
- Port 6 Control Register (P6CON)
  254
- Overview
  255
- Basic Timer Control Register (BTCON)
  256
- Basic Timer Function Description
  257
- Basic Timer Block Diagram
  258
- One 16-Bit Timer Mode (Timer 1)
  259
- Overview
  259
- Function Description
  259
- Timer 1/A Control Register (TACON)
  260
- Timer 1 Block Diagram (One 16-Bit Mode)
  261
- Two 8-Bit Timers Mode (Timer a and B)
  262
- Overview
  262
- Function Description
  262
- Timer 1/A Control Register (TACON)
  263
- Timer B Control Register (TBCON)
  264
- Timer a Block Diagram(Two 8-Bit Timers Mode)
  265
- Timer B Block Diagram (Two 8-Bit Timers Mode)
  266
- Overview
  267
- Watch Timer Control Register (WTCON)
  268
- Watch Timer Circuit Diagram
  269
- LCD Function Diagram
  270
- Overview
  270
- LCD Circuit Diagram
  271
- LCD RAM Address Area
  272
- LCD Display Data RAM Organization
  272
- LCD Clock Signal Frame Frequency
  272
- LCD Control Register (LCON)
  273
- LCD Voltage Dividing Resistor
  274
- Internal Voltage Dividing Resistor Connection
  274
- Segment (SEG) Signals
  275
- Select/No-Select Signals in Static Display Mode
  275
- Select/No-Select Signal in 1/2 Duty, 1/2 Bias Display Mode
  276
- Select/No-Select Signal in 1/3 Duty, 1/3 Bias Display Mode
  276
- LCD Signals and Wave Forms Example in 1/4 Duty, 1/3 Bias Display Mode
  277
- Programming Procedure
  278
- Overview
  278
- SIO Control Registers (SIOCON)
  279
- Serial I/O Module Control Register (SIOCON)
  279
- SIO Block Diagram
  280
- SIO Prescaler Register (SIOPS)
  280
- SIO Functional Block Diagram
  280
- Serial I/O Timing Diagram (SIO)
  281
- Serial I/O Timing in Transmit/Receive Mode (Tx at Rising, SIOCON.4 = 1)
  281
- Block Diagram for Voltage Level Detect
  282
- Overview
  282
- Battery Level Detector Control Register (BLDCON)
  283
- Battery Level Detect Circuit and Control Register
  283
- BLDCON Value and Detection Level
  283
- Overview
  284
- User Program Mode
  285
- Flash Memory Control Registers (User Program Mode)
  285
- Flash Memory User-Programming Enable Register (FMUSR)
  286
- Flash Memory Sector Address Register, High Byte (FMSECH)
  287
- Flash Memory Sector Address Register, Low Byte (FMSECL)
  287
- ISP TM (On-Board Programming) Sector
  288
- Program Memory Address Space
  288
- ISP Sector Size
  289
- Reset Vector Address
  289
- Sector Erase
  290
- Sector Configurations in User Program Mode
  290
- Sector Erase
  291
- Programming
  292
- Program
  293
- Reading
  294
- Hard Lock Protection
  295
- Overview
  296
- Absolute Maximum Ratings
  297
- D.C. Electrical Characteristics
  297
- Stop Mode Release Timing When Initiated by an External Interrupt
  300
- Data Retention Supply Voltage in Stop Mode
  300
- Stop Mode Release Timing When Initiated by a RESET
  301
- Input/Output Capacitance
  301
- Input Timing for External Interrupts
  302
- A.C. Electrical Characteristics
  302
- Input Timing for RESET
  303
- Serial Data Transfer Timing
  303
- LVR (Low Voltage Reset) Timing
  304
- Battery Level Detector Electrical Characteristics
  304
- Main Oscillation Characteristics
  305
- Sub Oscillation Characteristics
  305
- Main Oscillation Stabilization Time
  306
- Sub Oscillation Stabilization Time
  307
- Operating Voltage Range
  308
- A.C. Electrical Characteristics for Internal Flash ROM
  308
- Pin QFP Package Dimensions (64-QFP-1420F)
  309
- Overview
  309
- Pin LQFP Package Dimensions (64-LQFP-1010)
  310
- Overview
  311
- S3F8275X/F8278X/F8274X Pin Assignments (64-QFP-1420F)
  312
- S3F8275X/F8278X/F8274X Pin Assignments (64-LQFP-1010)
  313
- Descriptions of Pins Used to Read/Write the Flash ROM
  314
- Comparison of S3F8275X/F8278X/F8274X and S3C8275X/C8278X/C8274X Features
  314
- Operating Mode Characteristics
  315
- Operating Mode Selection Criteria
  315
- D.C. Electrical Characteristics
  316
- Operating Voltage Range
  317
- Shine
  318
- Overview
  318
- SAMA Assembler
  318
- Sasm88
  318
- Hex2Rom
  318
- Target Boards
  318
- SMDS Product Configuration (SMDS2+)
  319
- TB8275/8/4 Target Board
  320
- TB8275/8/4 Target Board Configuration
  320
- Power Selection Settings for TB8275/8/4
  321
- Main-Clock Selection Settings for TB8275/8/4
  321
- Select Smart Option Source Setting for TB8275/8/4
  322
- Smart Option Switch Settings for TB8275/8/4
  322
- SMDS2+ Selection (SAM8)
  323
- Idle LED
  323
- Stop LED
  323
- Device Selection Settings for TB8275/8/4
  323
- The SMDS2+ Tool Selection Setting
  323
- Pin Connectors (J101, J102) for TB8275/8/4
  324
- S3E8270 Cables for 64-QFP Package
  324

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