Xilinx SP605 User Manual page 32

Chapter 1: SP605 Evaluation Board
Table 1-15: Ethernet PHY Connections (Cont'd)
References
See the Marvell Alaska Gigabit Ethernet Transceivers product page for more information.
[Ref 17]
Also, see the LogiCORE™ IP Tri-Mode Ethernet MAC User Guide.
32
U1 FPGA Pin Schematic Net Name
U22 PHY_RXD7
AB7 PHY_TXC_GTPCLK
L20 PHY_TXCLK
U8 PHY_TXER
T8 PHY_TXCTL_TXEN
U10 PHY_TXD0
T10 PHY_TXD1
AB8 PHY_TXD2
AA8 PHY_TXD3
AB9 PHY_TXD4
Y9 PHY_TXD5
Y12 PHY_TXD6
W12 PHY_TXD7
www.xilinx.com
U46 M88E111
Pin Number Pin Name
120 RXD7
14 GTXCLK
10 TXCLK
13 TXER
16 TXEN
18 TXD0
19 TXD1
20 TXD2
24 TXD3
25 TXD4
26 TXD5
28 TXD6
29 TXD7
[Ref 7]
SP605 Hardware User Guide
UG526 (v1.1.1) February 1, 2010