Xilinx SP605 User Manual page 17

Table 1-6: SPI x4 Memory Connections
Notes:
1. Not a U1 FPGA pin
References
See the Winbond Serial Flash Memory Data Sheet for more information.
See the XPS Serial Peripheral Interface Data Sheet for more information.
SP605 Hardware User Guide
UG526 (v1.1.1) February 1, 2010
U1 FPGA
Schematic Net Name
Pin
AB2 FPGA_PROG_B
T14 FPGA_D2_MISO3
R13 FPGA_D1_MISO2_R
AA3 SPI_CS_B
AB20 FPGA_MOSI_CSI_B_MISO0
AA20 FPGA_D0_DIN_MISO_MISO1
Y20 FPGA_CCLK
–
–
(1)
J46.2 SPIX4_CS_B
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SPI MEM U32
Pin #
–
1
9
–
15
8
16
– –
– –
7
Detailed Description
SPI HDR J17
Pin Name Pin # Pin Name
– 1
IO3_HOLD_B 2
IO2_WP_B 3
– 4
DIN 5
IO1_DOUT 6
CLK 7
– 8
– 9 VCC3V3
CS_B –
[Ref 13]
[Ref 4]
–
–
–
TMS
TDI
TDO
TCK
GND
–
17