Toshiba TMP92CM22FG TLCS-900/H1 Series Manual page 98

B0CSL Bit symbol
(0140H) Read/Write
After reset
B0CSH Bit symbol
(0141H) Read/Write
After reset
MAMR0 Bit symbol M0V20
(0142H) Read/Write
After reset
MSAR0 Bit symbol M0S23
(0143H) Read/Write
After reset
B1CSL Bit symbol
(0144H) Read/Write
After reset
B1CSH Bit symbol
(0145H) Read/Write
After reset
MAMR1 Bit symbol M1V21
(0146H) Read/Write
After reset
MSAR1 Bit symbol M1S23
(0147H) Read/Write
After reset
B2CSL Bit symbol
(0148H) Read/Write
After reset
B2CSH Bit symbol
(0149H) Read/Write
After reset
MAMR2 Bit symbol
M2V22
(014AH) Read/Write
After reset
MSAR2 Bit symbol M2S23
(014BH) Read/Write
After reset
B3CSL Bit symbol
(014CH) Read/Write
After reset
B3CSH Bit symbol
(014DH) Read/Write
After reset
MAMR3 Bit symbol M3V22
(014EH) Read/Write
After reset
MSAR3 Bit symbol M3S23
(014FH) Read/Write
After reset
BEXCSH Bit symbol
(0159H) Read/Write
After reset
BEXCSL Bit symbol
(0158H) Read/Write
After reset
PMEMCR Bit symbol
(0166H) Read/Write
After reset
Note1: Always write "0".
Note2: Read-modify-write instruction is prohibited for BnCSL, BnCSH registers (n=0 to 3, EX).
Table 3.6.1 Control Register
7 6 5
B0WW2 B0WW1
W
0 1
− −
B0E
0 0 (Note) 0 (Note)
M0V19 M0V18
1 1 1
M0S22 M0S21
1 1 1
B1WW2 B1WW1
W
0 1
− −
B1E
0 0 (Note) 0 (Note)
M1V20 M1V19
1 1 1
M1S22 M1S21
1 1 1
B2WW2 B2WW1
W
0 1
−
B2E B2M
1 0 0 (Note)
M2V21 M2V20
1 1 1
M2S22 M2S21
1 1 1
B3WW2 B3WW1
W
0 1
− −
B3E
0 0 (Note) 0 (Note)
M3V21 M3V20
1 1 1
M3S22 M3S21
1 1 1
BEXWW2 BEXWW1
W
0 1
4 3
B0WW0
0
B0REC B0OM1
W
0 0
M0V17 M0V16
R/W
1 1
M0S20 M0S19
R/W
1 1
B1WW0
0
B1REC B1OM1
W
0 0
M1V18 M1V17
R/W
1 1
M1S20 M1S19
R/W
1 1
B2WW0
0
B2REC B2OM1
W
0 0
M2V19 M2V18
R/W
1 1
M2S20 M2S19
R/W
1 1
B3WW0
0
B3REC B3OM1
W
0 0
M3V19 M3V18
R/W
1 1
M3S20 M3S19
R/W
1 1
BEXOM1
0
BEXWW0
0
OPGE OPWR1
0 0
92CM22-96
TMP92CM22
2 1
B0WR2 B0WR1 B0WR0
W
0 1
B0OM0 B0BUS1 B0BUS0
0 0
M0V15 M0V14-V9 M0V8
1 1
M0S18 M0S17 M0S16
1 1
B1WR2 B1WR1 B1WR0
W
0 1
B1OM0 B1BUS1 B1BUS0
0 0
M1V16 M1V15-V9 M1V8
1 1
M1S18 M1S17 M1S16
1 1
B2WR2 B2WR1 B2WR0
W
0 1
B2OM0 B2BUS1 B2BUS0
0 0
M2V17 M2V16 M2V15
1 1
M2S18 M2S17 M2S16
1 1
B3WR2 B3WR1 B3WR0
W
0 1
B3OM0 B3BUS1 B3BUS0
0 0
M3V17 M3V16 M3V15
1 1
M3S18 M3S17 M3S16
1 1
BEXOM0 BEXBUS1 BEXBUS0
W
0 0
BEXWR2 BEXWR1 BEXWR0
W
0 1
OPWR0 PR1
R/W
0 1
2007-02-16
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
PR0
0