Toshiba TMP92CM22FG TLCS-900/H1 Series Manual page 178

Toshiba original cmos 32-bit microcontroller
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SBI0SR
Bit symbol
(1243H)
Read/Write
After reset
Read-
Function
Master/
modify-write
slave
instruction is
status
prohibited.
selection
monitor
Note: Writing in this register functions as SBI0CR2.
Serial Bus Interface Status Register
7
6
5
MST
TRX
BB
0
0
0
2
Transmitter/
I
C bus
receiver
status
status
monitor
selection
monitor
Figure 3.10.5 Register for I
92CM22-176
4
3
PIN
AL
R
1
0
Arbitration
Slave address
INTSBE0
lost
match
interrupt
detection
request
detection
monitor
monitor
monitor
0: −
0: Undetected
1: Detected
1: Detected
Last received bit monitor
0
1
GENERAL CALL detection monitor
0
1
Slave address match detection monitor
0
1
Arbitration lost detection monitor
0
1
INTSBE0 interrupt request monitor
0
1
2
I
C bus status monitor
0
1
Transmitter/receiver status monitor
0
1
Master/slave status monitor
0
1
2
C Bus Mode
TMP92CM22
2
1
0
AAS
AD0
LRB
0
0
0
Last
GENERAL
received bit
CALL
monitor
detection
0: 0
monitor
0: Undetected
1: 1
1: Detected
Last received bit was 0.
Last received bit was 1.
Undetected
GENERAL CALL detected
Undetected
Slave address match or
GENERAL CALL detected
Arbitration lost
Interrupt requested
Interrupt released
Free
Busy
Receiver
Transmitter
Slave
Master
2007-02-16

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