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(9) I
C bus/Serial channel (1/2)
2
Symbol
Name
Address
1240H
(Prohibit
RMW)
2
I
C mode
SBI0
SBI0CR1
control
register 1
1240H
(Prohibit
RMW)
SIO mode
SBI0
1241H
SBI0DBR
buffer
(Prohibit
RMW)
register
2
I
C bus0
1242H
I2C0AR
address
(Prohibit
RMW
register
Serial bus
SBI0SR
interface
status
when read
register
1243H
2
(I
C mode)
(Prohibit
RMW)
Serial bus
SBI0CR2
interface
control
when write
register2
Serial bus
SBI0SR
interface
status
when read
register
1243H
(SIO mode)
(Prohibit
RMW)
Serial bus
SBI0CR2
interface
control
when write
register2
7
6
5
BC2
BC1
BC0
W
0
0
0
Number of transfer bits
000: 8
001: 1
010: 2
011: 3
100: 4
101: 5
110: 6
111: 7
SIOS
SIOINH
SIOM1
W
0
0
0
Transfer
Transfer
Transfer mode
0: Stop
0: Continue
00: 8-bit transmit
1: Abort
10: 8-bit transmit/receive
1: Start
11: 8-bit receive
DB7
DB6
DB5
SA6
SA5
SA4
0
0
0
MST
TRX
BB
0
0
0
0: Slave
0: Receive
Bus status
monitor
1: Master
1: Transmit
0: Free
1: Busy
Start/stop
condition
generation
0: Start
condition
1: Stop
condition
92CM22-246
4
3
ACK
R/W
0
Acknowledge
mode
0: Disable
1: Enable
SIOM0
0
DB4
DB3
R (Receiving)/W (Transmission)
Undefined
SA3
SA2
W
0
0
Setting slave address
PIN
AL/SBIM1
W
1
0
Arbitration
Slave
INTSBE0
lost
address
request
match
detection
monitor
detection
monitor
0: Request
monitor
0: −
1: Cancel
0: Undetect
1: Detect
1: Detect
Serial bus interface
operating mode
selection
00: Port mode
01: SIO mode
2
10: I
C bus mode
11: (Reserved)
SIOF/
SBIM1
R/W
0
Transmit
Shift operation
status monitor
status monitor
0: Stopped
0: Stopped
1: Terminated
1: Terminated
in progress
Serial bus interface
operating mode
selection
00: Port mode
01: SIO mode
2
10: I
C bus mode
11: (Reserved)
TMP92CM22
2
1
0
SCK0/
SCK2
SCK1
SWRMON
W
R/W
0
0
0/1
Setting of the divide value "n"
000: 5
001: 6
010: 7
011: 8
100: 9
101: 10 110: 11
111: Reserved
SCK0
SCK2
SCK1
W
0
0
0
Setting of the divide value "n"
000:4 001:5 010:6 011:7
100:8 101:9 110:10
111:External clock SCK0
DB2
DB1
DB0
SA1
SA0
ALS
0
0
0
Address
recognition
0 :Enable
1: Disable
AAS/
AD0/
LARB/
SBIM0
SWRST
SWRST0
0
0
0
GENERAL
Last
CALL
received bit
detection
monitor
monitor
0: 0
0:Undetect
1: 1
1: Detect
Software reset
generate write "10"
and "01", then an
internal reset signal is
generated.
SEF/
−
−
SBIM2
W
0
0
0
in progress
Always
Always
write "0".
write "0".
2007-02-16
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