Output
Port
Function
During
Name
Name
Reset
D0-D7
D0-D7
OFF
P10-P17
D8-D15
P40-P47
A0-A7
P50-P57
A8-A15
P60-P67
A16-A23
P70
RD
P71
WRLL
ON
P72
WRLU
P73
WRUL
P74
WRUU
P75
R/W
−
P76
OFF
P80
CS0
P81
CS1
ON
P82
CS2
P83
CS3
P90
SCK
P91
SO
P92
SCL
−
PC0
PC1
TA1OUT
−
PC3
PC5
TA3OUT
PC6
TB0OUT
−
PD0
−
PD1
OFF
PD2
TB1OUT0
PD3
TB1OUT1
PF0
TXD0
−
PF1
PF2
SCLK0
PF3
TXD1
−
PF4
PF5
SCLK1
−
PF6
−
PF7
−
X2
ON: The buffer is always turned on. When the bus is released,
however ,output buffers for some pins are turned off.
OFF: The buffer is always turned off.
− : No applicable
Note: Condition A/B are as follows.
SYSCR2 register setting
<DRVE>
<SELDRV>
0
0
1
1
Table 3.3.6 Output Buffer State Table
When the CPU is
Operating
When
When
Used as
Used as
Function
Output
Pin
Port
−
ON upon
external
read
ON
−
ON
ON
−
ON
−
ON
−
ON
ON
−
ON
−
ON
−
−
HALT mode
IDLE1
0
Condition B
1
Condition A
0
Condition B
1
92CM22-28
Output Buffer State
In HALT
mode(IDLE2)
Condition A (Note)
When
When
When
Used as
Used as
Used as
Function
Output
Function
Pin
Port
−
OFF
OFF
ON
−
ON
OFF
ON
−
ON
OFF
−
ON
OFF
−
ON
OFF
−
ON
OFF
−
ON
OFF
−
−
ON
STOP
Condition A
Condition B
TMP92CM22
In HALT mode (IDLE1/STOP)
Condition B (Note)
When
When
Used as
Used as
Output
Function
Pin
Port
Pin
−
OFF
ON
ON
−
−
ON
OFF
−
−
ON
−
−
ON
−
−
ON
−
−
ON
−
−
ON
−
−
IDLE1: ON, STOP: High level output
When
Used as
Output
Port
−
ON
2007-02-16