Toshiba TMP92CM22FG TLCS-900/H1 Series Manual page 189

Toshiba original cmos 32-bit microcontroller
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2.
If <MST> = 0 (Slave mode)
slave mode after losing arbitration.
TMP92CM22 receives a slave address or a GENERAL CALL from the master
device, or when a GENERAL CALL is received and data transfer is completed, or
after matching received address. In the master mode, the TMP92CM22 operates
in a slave mode if it losing arbitration. An INTSBE0 interrupt request is
generated when a word data transfer terminates after losing arbitration. When an
INTSBE0 interrupt request is generated the <PIN> is cleared to "0" and the SCL
pin is pulled down to the low level. Either reading/writing from/to the SBI0DBR or
setting the <PIN> to "1" will release the SCL pin after taking t
processes according to conditions listed in the next table.
<TRX>
<AL>
<AAS>
1
1
0
0
1
0
In the slave mode the TMP92CM22 operates either in normal slave mode or in
In the slave mode, an INTSBE0 interrupt request generate when the
Check the SBI0SR<AL>, <TRX>, <AAS>, and <AD0> and implements
Table 3.10.1 Operation in the Slave Mode
<AD0>
1
0
The TMP92CM22 detects arbitration lost
when transmitting a slave address, and
receives a slave address for which the
value of the direction bit sent from
another master is "1".
1
0
In salve receiver mode, the
TMP92CM22 receives a slave address
for which the value of the direction bit
sent from the master is "1".
0
0
In salve transmitter mode, transmission of
data of single word is terminated.
1
1/0
The TMP92CM22 detects arbitration lost
when transmitting a slave address, and
receives a slave address or GENERAL
CALL for which the value of the direction
bit sent from another master is "0".
0
0
The TMP92CM22 detects arbitration lost
when transmitting a slave address or
data, and transfer of word terminates.
1
1/0
In slave receiver mode the TMP92CM22
receives a slave address or GENERAL
CALL for which the value of the direction
bit sent from the master is "0".
0
1/0
In slave receiver mode the TMP92CM22
terminates receiving word data.
92CM22-187
Conditions
Set the number of bits of single word to
<BC2:0>, and write the transmit data to
SBI0DBR.
Check the <LRB>, If <LRB> is set to "1",
set <PIN> to "1", reset "0" to <TRX> and
release the bus for the receiver no
request next data. If <LRB> was cleared
to "0", set bit number of single word to
<BC2:0> and write the transmit data to
SBI0DBR for the receiver requests next
data.
Read the SBI0DBR for setting the <PIN>
to "1" (Reading dummy data) or set the
<PIN> to "1".
Set bit number of single word to
<BC2:0>, and read the receiving data
from SBI0DBR.
TMP92CM22
time.
LOW
Process
2007-02-16

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