Toshiba TMP92CM22FG TLCS-900/H1 Series Manual page 216

Toshiba original cmos 32-bit microcontroller
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WDMOD
Bit symbol
(1300H)
Read/Write
After reset
Function
WDT control
1: Enable
WDCR
Bit symbol
(1302H)
Read/Write
Read
After reset
-modify
Function
-write
instruction
is prohibited
7
6
WDTE
WDTP1
WDTP0
R/W
1
0
Select detecting time
15
00: 2
/f
IO
17
01: 2
/f
IO
19
10: 2
/f
IO
21
11: 2
/f
IO
Figure 3.12.4 Watchdog Timer Mode Register
7
6
B1H: WDT disable code
4EH: WDT clear code
Figure 3.12.5 Watchdog Timer Control Register
92CM22-214
5
4
3
0
0
Always
write "0"
Watchdog timer out control
0
1
Connects WDT out to a reset
IDLE2 control
0
Stop
1
Operation
Watchdog timer detection time
15
00
2
17
01
2
19
10
2
21
11
2
Watchdog timer enable/disable control
0
Disabled
1
Enabled
5
4
3
W
WDT disable/clear control
B1H
4EH
Others
TMP92CM22
2
1
I2WDT
RESCR
R/W
0
0
IDLE2
1: Internally
connects
0: Stop
WDT out
1: Operate
to the
reset pin
/fIO (Approximately 3.28 ms at f
/f
(Approximately 1.31 ms at f
IO
/f
(Approximately 52.4 ms at f
IO
/f
(Approximately 210 ms at f
IO
2
1
Disable code
Clear code
Don't care
0
0
Always
write "0"
= 40 MHz)
OSCH
= 40 MHz)
OSCH
= 40 MHz)
OSCH
= 40 MHz)
OSCH
0
2007-02-16

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