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In this mode, the value of the register buffer will be shifted into TA0REG if 2
detected when the TA0REG double buffer is enabled.
Use of the double buffer facilitates the handling of low duty ratio waves.
Match with TA0REG
n
2
overflow
TA0REG
(Value of compare)
Register buffer
Example: To output the following PWM waves on the TA1OUT pin at f
To achieve a 51.2 μs PWM cycle by setting φT1=(16/fc)s (at f
51.2 μs/(16/fc)s = 128 = 2
Therefore n should be set to 7.
Since the low-level period is 36.0 μs when φT1 = (16/fc)s,
set the following value for TA0REG:
36.0 μs/(16/fc)s = 90 = 5AH
MSB
7
← −
TA01RUN
← 1
TA01MOD
← 0
TA0REG
← X
TA1FFCR
− −
← X
PCCR
− −
← X
PCFC
← 1
TA01RUN
X : Don't care, − : No change
Up counter = Q
1
Q
1
Q
2
Figure 3.7.18 Operation of Register Buffer
36.0 μs
51.2 μs
n
LSB
6
5
4
3
2
1
0
− − −
X
X
X
0
− −
1
1
0
0
1
1
0
1
1
0
1
0
X
X
X
1
0
1
X
−
−
X
X
1
−
−
X
X
1
−
−
X
X
X
1
1
92CM22-118
Up counter = Q
Shift from TA0REG (Register buffer)
= 40 MHz):
C
Stop TMRA0 and clear it to 0.
Select 8-bit PWM mode (cycle: 2
input clock.
Write 5AH.
Clear TA1FF to 0; set inversion to enable.
Set PC1 to TA1OUT pin.
Start TMRA0 counting.
TMP92CM22
overflow is
n
2
Q
2
Q
3
Write to TA0REG
= 40 MHz:
C
) and select φT1 as the
7
2007-02-16
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