Toshiba TMP92CM22FG TLCS-900/H1 Series Manual page 43

Toshiba original cmos 32-bit microcontroller
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Symbol
Name
INT0&INTAD
INTE0AD
enable
INTTC0&
INTETC01
INTTC1
enable
INTTC2&
INTETC23
INTTC3
enable
INTTC4&
INTETC45
INTTC5
enable
INTTC6&
INTETC67
INTTC7
enable
INTWD
INTWDT
enable
Interrupt request flag
IxxM2
0
0
0
0
1
1
1
1
Address
7
6
IADC
IADM2
F0H
R
0
0
INTTC1 (DMA1)
ITC1C
ITC1M2
F1H
R
0
0
INTTC3 (DMA3)
ITC3C
ITC3M2
F2H
R
0
0
INTTC5 (DMA5)
ITC5C
ITC5M2
F3H
R
0
0
INTTC7 (DMA7)
ITC7C
ITC7M2
F4H
R
0
0
F7H
Note: Always write "0".
IxxM1
IxxM0
0
0
1
1
0
0
1
1
92CM22-41
5
4
INTAD
IADM1
IADM0
R/W
0
0
ITC1M1
ITC1M0
R/W
0
0
ITC3M1
ITC3M0
R/W
0
0
ITC5M1
ITC5M0
R/W
0
0
ITC7M1
ITC7M0
R/W
0
0
Function (Write)
0
Disables interrupt request.
1
Sets interrupt priority level to 1.
0
Sets interrupt priority level to 2.
1
Sets interrupt priority level to 3.
0
Sets interrupt priority level to 4.
1
Sets interrupt priority level to 5.
0
Sets interrupt priority level to 6.
1
Disables interrupt request.
TMP92CM22
3
2
1
INT0
I0C
I0M2
I0M1
R
R/W
0
0
0
INTTC0 (DMA0)
ITC0C
ITC0M2
ITC0M1
R
R/W
0
0
0
INTTC2 (DMA2)
ITC2C
ITC2M2
ITC2M1
R
R/W
0
0
0
INTTC4 (DMA4)
ITC4C
ITC4M2
ITC4M1
R
R/W
0
0
0
INTTC6 (DMA6)
ITC6C
ITC6M2
ITC6M1
R
R/W
0
0
0
INTWD
ITCWD
R
0
2007-02-16
0
I0M0
0
ITC0M0
0
ITC2M0
0
ITC4M0
0
ITC6M0
0

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