(5) Bus access timing
•
External read/write bus cycle (0 waits)
T1
CLKOUT
(20 MHz)
CS
Address
RD
D7 to D0
WR
D7 to D0
•
External read/write bus cycle (1 wait)
T1
CLKOUT
(20 MHz)
CS
Address
RD
D7 to D0
WR
D7 to D0
T2
Read
input
Write
output
TW
T2
t
Inpu
t
Outpu
92CM22-86
TMP92CM22
Read
Write
2007-02-16