EPSON Stylus &2/25 800
188.8.131.52 Reset Circuits
The C202 MAIN board contains two reset circuits; for logic line (+5 V) and power line (+42 V). The
voltages for +5 V and +42 V in each reset circuit are monitored to prevent printer malfunction caused by
abnormal voltage levels. When an abnormal condition is detected, a reset signal is sent to the CPU to
reset the CPU and the gate array. The function of the reset circuit is described below.
Reset circuit for the +5 V line
The +5 V reset circuit monitors voltage level for the +5 V line at the port 3 VCC of IC9 PST592D, and
outputs a reset signal from the port 1 VOUT to the CPU gate array when it detects an abnormal
voltage level. The IC9 is energized under the conditions below.
When the printer is turned On, a reset signal is output for 100ms after the +5 V line voltage level
rises to 4.2 V.
During printing operation, when the 5 V line voltage level drops under 4.2 V, a reset signal is output.
The reset signal does not go off until 100 ms passed after the +5 V line voltage level recovers to 4.2
V, as described above.
Reset circuit for the +42 V line
The +42 V reset circuit monitors voltage level of 42 V at the port 3 VCC of IC8 M51955D, and feeds
back the information on the Power On/Off status to the CPU according to the detected voltage. When
the +42 V line drops under +33.2 V, IC8 detects the Power Off status and outputs an reset signal from
the port 6 to the CPU port 82 NMI via OR circuit of the IC19. When the voltage level recovers to 32.2
V, the port 6 of the IC8 stops outputting the signal, which is detected at the port 78 of the CPU.
Figure 2-20. Reset Circuit for the +5 VDC line
Figure 2-21 Reset Circuit for the +42 VDC line