Asf Motor Drive Circuit; Reset And Eeprom Circuits - Epson Stylus Photo895 Service Manual

Color inkjet printer
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EPSON Stylus PHOTO 895/785EPX/915/825

2.2.2.5 ASF Motor Drive Circuit

The motor driver IC on the MAIN board drives the ASF motor. This product uses 4-
phase 200-pole hybrid type stepping motor and performs constant current bi-polar
drive.
CPU (IC2) converts ASF motor phase control signal to LB1946 micro step drive form
and outputs to motor driver IC (IC10) LB1946 from each port. Based on this signal,
IC10 determines the phase mode.
The current value on each phase is determined by CPU (IC2) and outputs from each
port to driver IC (IC10). Motor driver IC generates motor driver waveform based on
these input signals and controls the motor. If the printer does not receive any data from
PC for 5 minutes, CPU set the motor drive current to 0 via each port and the motor
drive is turned off to save the power consumption.
E01A22C*
(IC2)
21
ASF_SCLK
22
ASF_DAT
23
ASF_LAT
3
C_P47
27
C_P25
+5V
Figure 2-23. ASF Motor Driver Circuit Block Diagram
Operating Principles
LB1946
(IC10)
23
7
1
CLK
OUTA
22
5
3
DATA
OUTA-
21
CN11
SET
9
2
27
OUTB
VREF1
8
4
OUTB-
16
VREF2
+42V
14
VBB
24
1
MD
VBB
25
+5V
CR1
28
18
VCC
CR2
3
2
E1
NC
12
4
E2
NC
20
5
ST
NC
15
10
GND
NC
17
11
NC
NC
19
NC
13
NC
26
NC
Electrical Circuit Operating Principles

2.2.2.6 Reset and EEPROM circuits

Unlike the previous products, this product uses IC in which reset circuit and EEPROM
are united.
Reset Circuit
Reset circuit RTC9822 (IC6), which monitors three types of voltage; logic group
(+3.3V, +5V) and power group (+42V), is mounted on the C408/C498 MAIN
board. Each reset circuit monitors the voltage of +3.3V, +5V and +42V and
prevents the operation failure of printer by resetting CPU and ASIC if any failure
is detected. It is possible for this IC to monitor the +3.3V, +5V and +42V lines by
one IC and performs resetting on each voltage. Following circuit diagram shows
the structure of reset circuit.
+42V
Rotor
Figure 2-24. Reset EEPROM Circuit Diagram
+3.3V line reset circuit
The 3.3V line is monitored at the VDD port of IC6. It outputs the reset signal
from the FRST port to the CPU ASIC if the irregular voltage (2.5V or less) is
detected.
+5V
+3.3V
+3.3V
RTC9822
(IC6)
14
VDD
12
5
VI5
CE
8
4
CLK
VDD2
10
3
VEX
DI
2
DO
7
VSS
9
EXO
1
13
MON
FRST
6
11
RST
IRQ
Revision B
CPU-
ASIC2in1
(IC2)
128
C_P20
129
C_P21
130
C_P22
133
C_P23
135
NMILVL
126
MRES
134
RESET
53

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