Figure 10. Mirror Channel Mode Memory Population - Intel Server Board S5500HV Technical Product Specification

Table of Contents

Functional Architecture

Mirrored Channel Mode

In Mirrored Channel Mode, the memory controller supports mirroring across channels, but not

across CPU sockets. The contents are mirrored between the first 2 channels of a given

processor. For CPU1, mirrored slot pairs include {A1, B1} and {A2, B2}. For CPU2, the mirrored

slot pairs include {D1, E1} and {D2, E2}. The sockets of the 3rd channel of each CPU are not

used in this mode.

Mirrored channel mode requires the following memory population rules:

Channel 0 and Channel 1 of a given processor must be populated identically.

DIMM slot populations within a channel do not have to be identical, but the same DIMM

slot location across Channel 0 and Channel 1 must be populated the same.

For example; DIMM slots A1 and B1 must have identical DIMMs installed to be

mirrored together. DIMM slots A2 and B2 must have identical DIMMs installed to be

mirrored together. However the DIMMs used in mirrored pair {A1, B1} can be

different than those used in mirrored pair {A2, B2}.

With two processors installed, DIMM slots associated with each processor must have a

valid mirroring configuration for memory channels 0 and 1. However, the memory

configuration of each processor can be different from the other.

The exception to this rule is that one processor has no memory installed. Because of

the associated latency, this is NOT a recommended operating mode.

Revision 1.2

Intel® Server Board S5500HV/Intel® Server System SR1670HV TPS

Intel

Xeon

Processor

CPU 2

5500 Series