Pci Interrupt Routing Map - Intel D865PERLX Specification

Intel Desktop Board D865PERC/D865PESO Technical Product Specification
Table 19.

PCI Interrupt Routing Map

PCI Interrupt Source
AGP connector
ICH5 USB UHCI controller 1 INTA
SMBus controller
ICH5 USB UHCI controller 2
AC '97 ICH5 Audio
ICH5 LAN
ICH5 USB UHCI controller 3
ICH5 USB UHCI controller 4 INTA
ICH5 USB 2.0 EHCI controller
PCI bus connector 1
PCI bus connector 2
PCI bus connector 3
PCI bus connector 4
PCI bus connector 5
PCI bus connector 6
Serial ATA
Note: Desktop Board D865PERC only
✏
NOTE
In PIC mode, the ICH5 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6,
7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a
unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or
more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 18 for the
allocation of PIRQ lines to IRQ signals in APIC mode.
56
PIRQA PIRQB
INTA INTB
INTB
INTB
INTD INTA
(Note)
(Note)
INTC
(Note)
INTA
ICH5 PIRQ Signal Name
PIRQC PIRQD PIRQE
INTB
INTA
INTC
INTD
INTC
INTB INTC
INTB INTA
INTA INTD
INTB
PIRQF PIRQG PIRQH
INTD
INTA INTB INTC
INTB INTA INTD
INTC INTD
INTB
INTD INTC
INTA