HP Visualize J5000 - Workstation Handbook page 59

Table 3-1. Chassis Codes for J5000 and J7000 Workstations
Ostat Code FRU
TST 1 n 26 SYS BD
TST 1 n 27 SYS BD
TST 1 n 28 SYS BD
TST 1 n 29 SYS BD
TST 1 n 2A SYS BD
TST 1 n 2B SYS BD
TST 1 n 2C SYS BD
TST 1 n 30 SYS BD
1 n 31
WRN SYS BD
1 n 32
FLT SYS BD
INI 1 n 3C SYS BD
TST 1 n 3E SYS BD
TST 1 n A0 SYS BD
TST 1 n A1 SYS BD
TST 1 n A2 SYS BD
TST 1 n A3 SYS BD
1 n A4
TST SYS BD
TST 1 n A5 SYS BD
TST 1 n B1 SYS BD
Chapter 3
Message
CPU n ext intrpt
CPU n itimer test
CPU n multi-media
CPU n shadow reg
CPU n diagnse reg
CPU n rdr test
CPU n bypass test
CPU n start est
CPU n skip est
CPU n bad tst mod
CPU n initialize
CPU n exit er tst
CPU n fpu tests
CPU n fpu reg tst
CPU n fpu inst
CPU n fpu traps
CPU n fpu misc
CPU n fpu bypass
CPU n TLB RAM tst
Identifying LCD-Indicated Conditions
Description
CPU n is starting its external interrupt
self-test.
CPU n is starting its interval timer
self-test.
CPU n is starting its multi-media
instructions self-test.
CPU n is starting its shadow register
self-test.
CPU n is starting its diagnose register
self-test.
CPU n is starting its remote diagnose
register self-test.
CPU n is starting its integer bypass
operation self-test.
CPU n is starting its early (pre-memory)
self-tests.
CPU n is bypassing its early self-tests to
save time.
CPU n detected an unsupported system
mode.
CPU n is initializing after self-tests.
CPU n finished its early self-tests.
CPU n is starting its floating-point unit
self-tests.
CPU n is starting its floating-point
register self-test.
CPU n is starting its floating-point
instruction self-test.
CPU n is starting its floating-point trap
self-test.
CPU n is starting its floating-point
miscellaneous operations self-test.
CPU n is starting its floating-point
bypassing self-test.
CPU n is starting its TLB register
self-test.
Troubleshooting
55