ST STM32MP257F-EV1 User Manual page 22

Table 14 describes the pinout of the microSD
Pin
1
2
3
4
5
6
7
8
9
7.7 Quad-SPI NOR flash memory
The 512‑Mbit NOR flash memory is managed through the Octo‑SPI interface used in Quad-SPI mode. The NRST
reset pin from the microcontroller manages the Quad-SPI flash memory RESET function. Octo‑SPI is a bootable
interface.
I/O
PD3
PD0
PD4
PD5
PD6
PD7
NRST
UM3359 - Rev 2
Table 14.
Pin name Signal name
DAT2 SD.SDMMC1_D2
DAT3_CD SD.SDMMC1_D3
CMD SD.SDMMC1_CMD
VDD VDD_SD
CLK SD.SDMMC1_CLK
VSS GND
DAT0 SD.SDMMC1_D0
DAT1 SD.SDMMC_D1
CARD_DETECT uSD_DETECT
Table 15. Octo‑SPI flash memory I/O interface
™
connector (CN1).
™
microSD connector (CN1) pinout
I/O
PE0
PE1
PE2
-
PE3
-
PE4
PE5
PD9
Configuration
CSn (QSPI1.NCS1)
SCLK (QSPI1.CLK)
IO0 (QSPI1.IO0)
IO1 (QSPI1.IO1)
IO2 (QSPI1.IO2)
IO3 (QSPI1.IO3)
RESETn (NRST)
UM3359
Board functions
Function
SDIO.D2
SDIO.D3
SDIO.CMD
VDD_SDCARD
SDIO.CLK
GND
SDIO.D0
SDIO.D1
uSD_DETECT active low
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