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ST STM32MP257F-EV1 User Manual page 15

Evaluation board with stm32mp257f mpu

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6.6
Clock sources
6.6.1
LSE clock reference
The LSE clock reference on the STM32MP257FAI3 microprocessor is provided by the external crystal X2:
32.768 kHz crystal
6.6.2
HSE clock reference
The HSE clock reference on the STM32MP257FAI3 microprocessor is provided by the external crystal X4:
40 MHz crystal
6.7
Reset sources
The reset signal of STM32MP257F-EV1 is active LOW. The internal pull‑up of the STM32MP2 forces the NRST
signal to a high level.
The sources of reset are:
The reset button B1 (black button)
STPMIC25APQR
The embedded STLINK-V3EC
STM32MP257FAI3
6.8
Boot options
At startup, the boot pins select the boot source used by the internal bootROM.
configurations of the boot pins.
Boot 3
0
0
0
0
0
0
1
1
Note:
For the complete table, refer to the STM32MP257 datasheet.
UM3359 - Rev 2
Table 5.
Boot 2
Boot 1
Boot 0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
1
1
0
0
0
0
1
1
Boot mode pin simplified table
Boot mode A35
Forced USB boot for flash
programming
SD card on SDMMC1
eMMC on SDMMC2
Development boot
QSPI
-
-
-
UM3359
Hardware layout and configuration
Table 5
describes the
Boot mode M33
Forced USB boot for flash
programming
-
-
-
SD card on SDMMC1
eMMC on SDMMC2
QSPI
page 15/56

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