AXAU15 User Manual
speed of DDR4 SDRAM can reach 1200MHz (data rate 2400Mbps). In addition, a
256MBit QSPI FLASH is also integrated on the core board for starting storage
configurations and system files.
This core board extends to 72 IO ports with level standard 3.3V , 102 IO ports
with level standard 1.8V, and 12 pairs of GTH high-speed RX/TX differential
signals. For users who require a lot of IO, this core board will be a good choice.
Moreover, the routing between the FPGA chip and the interface has been
processed with equal length and differential processing, and the core board size
is only 45 * 55 (mm), which is very suitable for secondary development.
ACAU15 Front view of core board
2.2 FPGA Chip
The FPGA development board uses Xilinx's ARTIX UltraScale+ FPGA chip, model
number XCAU15P-2FFVB676I. The speed class is 2 and the temperature class is
industrial. This model is a FFVB676 package with 676 pins. The chip naming
rules for Xilinx ARTIX UltraScale+ FPGA are shown in Figure 2-2-1 below:
www.alinx.com
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