Pcie3.0 X4 Interface - Alinx ARTIX UltraScale+ AXAU15 User Manual

PHY_RXD1 B64_L9_N
PHY_RXD2 B64_L8_P
PHY_RXD3 B64_L8_N
PHY_GTXC B64_L18_N
PHY_TXEN B64_L18_P
PHY_TXD0 B64_L24_P
PHY_TXD1 B64_L24_N
PHY_TXD2 B64_L6_P
PHY_TXD3 B64_L6_N
3.3 PCIe4.0 X4 Interface
The carrier board AXAU15 provides an industrial grade high-speed data
transmission PCIe 4.0 x4 interface. The overall dimensions of the PCIE card
comply with the standard PCIe card electrical specifications and can be directly
used on the x4 PCIe slot of a regular PC.
The receiving and transmitting signals of the PCIe interface are directly
connected to the GTP transceiver of the FPGA. The four channel TX signal and
RX signal are both connected to the FPGA in a differential signal manner, and
the single channel communication rate can reach up to 8G bit bandwidth. The
reference clock for PCIe is provided to the development board by the PCIe slot
of the PC, with a reference clock frequency of 100Mhz.
The design diagram of the PCIe interface of the development board is shown in
Figure 3-3-1, where the TX sending signal and the reference clock CLK signal are
connected in AC coupling mode.
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AC23 Receive Data Bit1
AD23 Receive Data Bit2
AE23 Receive Data Bit3
AE16 RGMII Transmit Clock
Transmit Enable Signal
AD16
Y18 Transmit Data bit0
AA18 Transmit Data bit1
AB24 Transmit Data bit2
AC24 Transmit Data bit3
AXAU15 User Manual
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