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Instruction Execution Times and Number of Steps
10-5-18 Interrupt Control Instructions
Instruction
Mnemonic
SET INTERRUPT
MSKS
MASK
READ INTER-
MSKR
RUPT MASK
CLEAR INTER-
CLI
RUPT
DISABLE INTER-
DI
RUPTS
ENABLE INTER-
EI
RUPTS
10-5-19 High-speed Counter and Pulse Output Instructions (CJ1M CPU21/
22/23 CPU Units only)
Instruction
Mnemonic
MODE CONTROL
INI
HIGH-SPEED
PRV
COUNTER PV
READ
Code
Length
(steps)
CPU6@H-R
(See
note.)
690
3
25.6
692
3
11.9
691
3
27.4
693
1
15.0
694
1
19.5
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table.
Code
Length
(steps)
CPU6@H-R
(See
note 1.)
880
4
---
---
---
---
---
---
---
881
4
---
---
---
---
---
---
---
---
ON execution time ( µ s)
CPU6@H
CPU4@H
CPU4@
25.6
38.4
39.5
11.9
11.9
11.9
27.4
41.3
41.3
15.0
16.8
16.8
19.5
21.8
21.8
ON execution time ( µ s)
CPU6@H
CPU4@H
CPU4@
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Section 10-5
Conditions
CJ1M
CJ1M
excluding
CPU11/21
CPU11/21
44.7
42.9
---
16.9
15.9
---
42.7
44.5
---
30.3
28.5
---
37.7
34.4
---
Conditions
CJ1M
CJ1M
excluding
CPU11/21
CPU11/21
77.00
80.4
Starting high-speed
counter comparison
43.00
43.0
Stopping high-
speed counter com-
parison
43.40
48.8
Changing pulse
output PV
51.80
50.8
Changing high-
speed counter PV
31.83
28.5
Changing PV of
counter in interrupt
input mode
45.33
49.8
Stopping pulse out-
put
36.73
30.5
Stopping
PWM(891) output
42.40
43.9
Reading pulse out-
put PV
53.40
65.9
Reading high-
speed counter PV
33.60
30.5
Reading PV of
counter in interrupt
input mode
38.80
40.0
Reading pulse out-
put status
39.30
66.9
Reading high-
speed counter sta-
tus
38.30
34.5
Reading PWM(891)
status
117.73
145.7
Reading high-
speed counter
range comparison
results
48.20
48.5
Reading frequency
of high-speed
counter 0
487
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