Sequence Input Instructions - Omron CJ - 08-2008 Operation Manual

Programmable controllers
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Instruction Execution Times and Number of Steps

10-5-1 Sequence Input Instructions

Instruction
Mnemonic
LOAD
LD
!LD
LOAD NOT
LD NOT
!LD NOT
AND
AND
!AND
AND NOT
AND NOT
!AND NOT
OR
OR
!OR
OR NOT
OR NOT
!OR NOT
AND LOAD
AND LD
OR LOAD
OR LD
NOT
NOT
CONDITION ON
UP
CONDITION OFF
DOWN
LOAD BIT TEST
LD TST
LOAD BIT TEST
LD TSTN
NOT
AND BIT TEST
AND TSTN 351
NOT
OR BIT TEST
OR TST
OR BIT TEST NOT OR TSTN
will occur if the capacity of a user program for another PLC is converted for
a CJ-series PLC based on the assumption that 1 word is 1 step. Refer to
the information at the end of 10-5 Instruction Execution Times and Number
of Steps for guidelines on converting program capacities from previous
OMRON PLCs.
2. Most instructions are supported in differentiated form (indicated with ↑ , ↓ ,
@, and %). Specifying differentiation will increase the execution times by
the following amounts.
Symbol
↑ or ↓
@ or %
3. Use the following times as guidelines when instructions are not executed.
CPU6@H-R
Approx. 0.1 µs Approx. 0.1 µs Approx. 0.2 µs Approx. 0.2 to
Code
Length
(steps)
CPU6@H-R
(See
note.)
---
1
0.016
0.02
---
2
+21.14
+21.14
---
1
0.016
0.02
---
2
+21.14
+21.14
---
1
0.016
0.02
---
2
+21.14
+21.14
---
1
0.016
0.02
---
2
+21.14
+21.14
---
1
0.016
0.02
---
2
+21.14
+21.14
---
1
0.016
0.02
---
2
+21.14
+21.14
---
1
0.016
0.02
---
1
0.016
0.02
520
1
0.016
0.02
521
3
0.24
0.3
522
4
0.24
0.3
350
4
0.11
0.14
351
4
0.11
0.14
4
0.11
0.14
350
4
0.11
0.14
351
4
0.11
0.14
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table
CJ1-H
CPU6@H-R
CPU6@H
+0.24 µs
+0.24 µs
+0.24 µs
+0.24 µs
CJ1-H
CPU6@H
CPU4@H
ON execution time ( µ s)
CPU6@H
CPU4@H
CPU4@
0.04
0.08
+21.16
+21.16
0.04
0.08
+21.16
+21.16
0.04
0.08
+21.16
+21.16
0.04
0.08
+21.16
+21.16
0.04
0.08
+21.16
+21.16
0.04
0.08
+21.16
+21.16
0.04
0.08
0.04
0.08
0.04
0.08
0.42
0.54
0.42
0.54
0.24
0.37
0.24
0.37
0.24
0.37
0.24
0.37
0.24
0.37
Section 10-5
CJ1M
CPU4@H
CPU@@
+0.32 µs
+0.5 µs
+0.32 µs
+0.5 µs
CJ1M
CPU@@
Approx. 0.2 to
0.5 µs
0.4 µs
CJ1M
CJ1M
excluding
CPU11/21
CPU11/21
0.10
0.10
---
+24.10
+28.07
Increase for imme-
diate refresh
0.10
0.10
---
+24.10
+28.07
Increase for imme-
diate refresh
0.10
0.10
---
+24.10
+28.07
Increase for imme-
diate refresh
0.10
0.10
---
+24.10
+28.07
Increase for imme-
diate refresh
0.10
0.10
---
+24.10
+28.07
Increase for imme-
diate refresh
0.10
0.10
---
+24.10
+28.07
Increase for imme-
diate refresh
0.05
0.05
---
0.05
0.05
---
0.05
0.05
---
0.50
0.50
---
0.50
0.50
---
0.35
0.35
---
0.35
0.35
---
0.35
0.35
---
0.35
0.35
---
0.35
0.35
---
CJ1
CPU4@
+0.45 µs
+0.33 µs
CJ1
CPU4@
Conditions
473

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