Omron CJ - PROGRAMMING MANUAL 08-2008 Programming Manual page 232

Programmable controllers
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Interrupt Tasks
194
Reading and writing I/O
memory common to
interrupt tasks.
Processing with interrupt task
execution enabled
Problems may occur with data concurrency even if DI(693) and EI(694) are
used to disable interrupt tasks during execution of an instruction that requires
response reception and processing (such as a network instruction or serial
communications instruction).
Note Execution of the BIT COUNTER (BCNT), BLOCK SET (BSET), and BLOCK
TRANSFER (XFER) instructions will not be interrupted for execution of inter-
rupt task, i.e., execution of the instruction will be completed before the inter-
rupt task is executed, delaying the response of the interrupt. To prevent this,
separate data processing for these instructions into more than one instruc-
tions, as shown below for XFER.
XFER
&100
D00000
D30000
XFER instruction is
not interrupted.
Cyclic task
Processing
XFER
separated.
&50
D00000
D30000
XFER
&50
D00050
D30050
Section 4-3
Disabled
Interrupt task
Enabled
Interrupt task
Interrupts are possible as
soon as execution of XFER
has been completed.

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