Tektronix CURVE-TRACER 576 Instruction Manual page 64

Circuit Description-Type 576
and the current setting resistor pairs. It is these current
paths which cause step current to be conducted by the step
amplifier input. Whenever a high appears at one of the
modified counter outruts, its associated stcoring diode;
off and the current conducted by its associated resistor pair
is conducted by the step amp I ifier input.
The amount of current conducted by the step amplifier
input is a function of the modified counter output and may
be determined by adding the currents conducted by each
resistor pair associated with a modified counter output
which is high. For example, if five counts have been re-
corded by the counter, highs appear at the cathodes of D 70
and D72. The current applied to the step amplifier input
is, therefore, one increment by R54-R55 plus four incre·
ments by R60-R61, totalling 5 increments. Thus five
counts recorded by the counter results in five increments
of analog current conducted by the step amplifier input.
The 1-2-4-4 modified counter code is designed so that the
step current conducted by the step amplifier input in-
creases by one increment for each clock pulse counted
by the counter (until the counter resets). ZERO STEP
adjustment R97 controls the level of the zero step (with
zero offset) by adjusting the quiescent current through
D82 and D83.
Steering diodes D66, D67, D68 and D69 provide current
paths for the currents conducted by R55, R58, R61 and
R64, respectively, whenever the STEP MU L T .1 X button is
pressed. (With the STEP MULT .1X button pressed D55,
D58, D61 and D64 are reverse biased.) These new current
paths reduce the amount of current per increment which
may be conducted by the step amp I ifier input by a factor
of 10. The result is that the step amplitude is reduced to
one-tenth its normal value.
The fourth set of steering diodes, D41, D42, D43 and
D44 is used only when the step generator is operating in the
pulsed mode. In all other cases, their cathodes are held high
and they have no effect on the current applied to the step
amplifier input
The current summing node sums current from R95 as
well as the digital-to-analog converter. The zero step level
may be offset either in the direction which steps are ascend-
ing or in the opposite direction of ascent as deter-
mined by the DC current conducted by R95. If offset in
the direction of the steps is desired, the AID OFFSET
button is pressed. This allows positive voltage to be applied
to the base of 090 using the OFFSET MUL T control,
which raises the emitter voltage of 093 and causes addi-
tional current to be conducted through R95. When the
OPPOSE OFFSET button is
pr~ssed,
negative voltage is
applied to the base of 090 using the OFFSET MU L T con-
trol, which causes current to be conducted through R95 in
the opposite direction. OPPOSE OFFSET adjustment R85
and AID OFFSET adjustment R86 adjusts the offset level
of the steps when the OPPOSE OFFSET and AID OFFSET
buttons are pressed, respectively.
3-10
Pulsed Step Mode. When one of the PULSED STEPS
buttons is pressed, the Step Generator output steps are
reduced to short pulses. These pulsed steps are obtained by
inhibiting the digital-to-analog converter for all but 300 JlS
or 80 ps of each step.
The digital-to-analog converter is inhibited by prossinq
oither the 300f1s or the 80
flS
PULSED STEPS button (see
the Stop Generator schematic). Pressing one of these;
buttons turns 041 on and rrovides curront paths for the
resistor pairs through D41, D42, D43 and D44. Tho digital-
to-analog converter is inhibited in this state because no stor
current is available to be conducted by the step amplifier
inrut, regardless of the condition of the modified counter
output. The digital-to-analog converter remains inhibitod
until a negative-going trigger from the collector of 030 rr>
verse biases D39 and turns off 041. With 041 off, its col-
lector goes high, turning on 036 and reverse biasing stecrincJ
diodes D41, D42, D43 and D44. The digital-to-analog con-
verter is now enabled and free to produce a step in the
manner described previously. The duration of the step is
controlled by the charge time of C35. With 036 on, its
collector holds one side of C35 at about ground, allowing
the other side to be charged throuqh R39 (and R37 when
the 300
f1S
button is pressed). C35 charges until D39 is
forward biased and 041 again turns on. With 041 on, 036
is turned off and the digital-to-analog converter is again
inhibited by the steerinq diodes D41, D42, D43 and D44.
Since each pulsed step is triggered by a negative-going
trigger from the delay circuit, the pu I sed steps always
appear at the peak of the Collector Supply output. When
the step generator is operating in the pulsed step mode, the
2X RATE button is inhibited.
When 041 is turned on, 046 is turned off, which also
turns off 052. The collector of 052 is connected to the
grid of the CRT, V897 (see the CRT Circuit schematic).
When 052 turns off, its collector voltage goes negative,
causing the intensity of the CRT display to be reduced. The
display intensity remains reduced unti I 041 turns off,
allowing 046 and 052 to turn
o~.
The CRT display in the
pulsed step mode is, therefore, intensified only when a
pulsed step occurs.
The Collector Supply schematic shows that when either
the 300
ps
or the 80 ps PULSED STEPS button is pressed,
K320 is energized and the Collector Supply operates in its
DC mode. It also shows, that if the 300
f1S
and 80
f1S
PULSED STEPS buttons are pressed together, 300
ps
pulsed steps are generated and the collector supply operates
in its normal mode ( K320 is not energized).
Step Amplifier
The step amplifier transforms the output of the step
generator into current or voltage steps of various ampli-
tudes to be applied to the device under test. The AMPLI-
TUDE switch, which is part of this circuit, determines the
amplitude of the steps. The circuit consists of a current to
voltage converter, an inverter and a differential output
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