Advantech PCIE-1751 User Manual page 34

One shot
Timer/pulse
Pulse width modulation
A.4 General
Table A.4: General
Power consumption
Power Supply output
Physical
Environmental
PCIE-1751 User Manual
Internal clock source fre-
quency
Internal clock accuracy
External clock source fre-
quency
Delay count
Gate source
Gate polarity
Generation type
Timebase clock fre-
quency
Timebase clock accuracy 50 ppm
Output frequency
Gate function
Gate polarity
Interrupt generation
Timebase clock
frequency
Timebase clock accuracy 50 ppm
Pulse width
Pulse width resolution
Number of pulses
Gate function
Gate polarity
Generation type
+3.3 V
+5 V (±5%)
Form factor
Dimensions
Weight
I/O connector
Operating temperature
Storage temperature
Operating humidity
Storage humidity
26
10 MHz, 1 MHz, 100 kHz, or 10 kHz,
software-configurable
50 ppm
10 MHz max.
1 ~ 4,294,967,295
External
Rising edge or falling edge, software-
configurable
Static
40 MHz
0.1 Hz ~ 10 MHz
Enabled or disabled, software-configu-
rable
High active or low active, software-
configurable
Enabled or disabled, software-configu-
rable
40 MHz
100 ns ~ 1 s
25 ns
1 ~ 4,294,967,295 or infinite, software-
configurable
Enabled or disabled, software-configu-
rable
High active or low active, software-
configurable
Static
330 mA typ. 400 mA max.
200 mA max.
PCI Express
3
175 x 100 x 18 mm
3
(6.9 x 3.9 x 0.7 in. )
113 g
68-pin SCSI (pin type)
0 °C to 60 °C (32 °F to 140 °F)
-20 °C to 70 °C (-4 °F to 158 °F)
10% to 90% RH, non-condensing
5% to 95% RH, non-condensing