Advantech PCIE-1751 User Manual page 33

A.3 Counter
Table A.3: Counter
Channels
Resolution
Input type
Input logic level
Input protection voltage -0.5 V ~ 6.5 V
Pull-up resistor
Debounce filter
Output type
Output logic level
Load current
Counter measurement function
Event counting
Frequency
measurement
Pulse width
measurement
Counter output function
3
16 bits
5 V TTL
Logic high
Logic low
Working voltage
10 kΩ
32 ns ~ 67 ms, software-configurable
5 V TTL
Logic high
Logic low
8 mA max.
Input frequency
Clock polarity
Gate function
Gate polarity
Measuring type
Measuring method
Input frequency
Accuracy
Measuring type
Pulse width range
Pulse width resolution
Accuracy
Measuring type
25
2.0 V min.
0.8 V max.
-0.25 V ~ 5.25 V
4.0 V min. @ 2 mA source/5.2 V max.
0.4 V max. @ 2 mA sink
10 MHz max.
Rising edge or falling edge, software-
configurable
Enabled or disabled, software-configu-
rable
High active or low active, software-
configurable
Instant
Counting pulse by system time, period
inverse, or auto-adaptive, software-
configurable
0.1 Hz ~ 10 MHz
f /40 MHz or 50 ppm, whichever is
IN
larger
Instant
100 ns ~ 1 s
25 ns
50 ppm
Instant
PCIE-1751 User Manual