Advantech PCIE-1751 User Manual page 27

Table 3.4: PCIE-1751 Pin Assignments
Pin Name Direction
DI/O Port 0<0..7> I/O
DI/O Port 1<0..7> I/O
DI/O Port 2<0..7> I/O
DI/O Port 3<0..7> I/O
DI/O Port 4<0..7> I/O
DI/O Port5<0..7> I/O
INT_OUT O
CNT<0..2>_CLK I
CNT<0..2>_OUT O
CNT<0..2>_GATE I
GND -
+5V O
Digital Input (TTL DI/O, Pull-Up/Down)
A digital input/output (DI/O) channel can be configured by software to perform digital
input measurement, which is the power-on default configuration, or digital output
generation. When performing digital input measurement, the voltage logic level
between the digital input (DI) terminal and the digital ground (DGND) terminal is mea-
sured. To prevent undetermined or fluctuating results when input is floating, the digi-
tal input channel can be configured as internally pulled-up or pulled-down by
software. This is shown in Figure 3.2.
Figure 3.2 Digital input signal connection
Description
Bi-directional digital input/output port 0
terminals.
Bi-directional digital input/output port 1
terminals.
Bi-directional digital input/output port 2
terminals.
Bi-directional digital input/output port 3
terminals.
Bi-directional digital input/output port 4
terminals.
Bi-directional digital input/output port 5
terminals.
Interrupt Out
Counter 0 clock input terminal.
Counter 0 output terminal.
Counter 0 gate input terminal.
Ground terminals for digital signals.
+5 V supply output.
19
Pin Number
1 ~ 8
10 ~ 17
19 ~ 26
35 ~ 42
44 ~ 51
53 ~ 60
33
62, 64, 66
28, 30, 32
63, 65, 67
9, 18, 27, 29,
31, 43, 52, 61
34, 68
PCIE-1751 User Manual