Advantech PCIE-1751 User Manual page 15

For infinite pulse generation, the counter output starts generating pulses when
armed and continues until stopped by software. This is shown in Figure 1.12.
Figure 1.12 Infinite pulse generation
The output can be gated. If the counter gate is high, pulses are output normally.
On the other hand, if the counter gate is low, output is disabled. This is shown in
Figure 1.13.
Figure 1.13 Gated pulse width modulation output
7 PCIE-1751 User Manual