Espressif ESP32-S2 Programming Manual page 198

Chapter 2. API Reference
Macros
ETH_MAC_FLAG_WORK_WITH_CACHE_DISABLE
MAC driver can work when cache is disabled
ETH_MAC_FLAG_PIN_TO_CORE
Pin MAC task to the CPU core where driver installation happened
ETH_MAC_DEFAULT_CONFIG()
Default configuration for Ethernet MAC object.
Type Definitions
typedef struct esp_eth_mac_s
Ethernet MAC.
Enumerations
enum emac_rmii_clock_mode_t
RMII Clock Mode Options.
Values:
EMAC_CLK_DEFAULT
Default values configured using Kconfig are going to be used when "Default"selected.
EMAC_CLK_EXT_IN
Input RMII Clock from external. EMAC Clock GPIO number needs to be configured when this option
is selected.
Note MAC will get RMII clock from outside. Note that ESP32 only supports GPIO0 to input the RMII
clock.
EMAC_CLK_OUT
Output RMII Clock from internal APLL Clock. EMAC Clock GPIO number needs to be configured
when this option is selected.
enum emac_rmii_clock_gpio_t
RMII Clock GPIO number Options.
Values:
EMAC_CLK_IN_GPIO = 0
MAC will get RMII clock from outside at this GPIO.
Note ESP32 only supports GPIO0 to input the RMII clock.
EMAC_APPL_CLK_OUT_GPIO = 0
Output RMII Clock from internal APLL Clock available at GPIO0.
Note GPIO0 can be set to output a pre-divided PLL clock (test only!). Enabling this option will configure
GPIO0 to output a 50MHz clock. In fact this clock doesn't have directly relationship with EMAC
peripheral. Sometimes this clock won't work well with your PHY chip. You might need to add
some extra devices after GPIO0 (e.g. inverter). Note that outputting RMII clock on GPIO0 is an
experimental practice. If you want the Ethernet to work with WiFi, don't select GPIO0 output
mode for stability.
EMAC_CLK_OUT_GPIO = 16
Output RMII Clock from internal APLL Clock available at GPIO16.
EMAC_CLK_OUT_180_GPIO = 17
Inverted Output RMII Clock from internal APLL Clock available at GPIO17.
Header File
• components/esp_eth/include/esp_eth_phy.h
Espressif Systems
esp_eth_mac_t
187
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