Chapter 2. API Reference
TEMP_SENSOR_CAL (BLOCK2)
→
ADC1_MODE0_D2 (BLOCK2)
→
ADC1_MODE1_D2 (BLOCK2)
→
ADC1_MODE2_D2 (BLOCK2)
→
ADC1_MODE3_D2 (BLOCK2)
→
ADC2_MODE0_D2 (BLOCK2)
→
ADC2_MODE1_D2 (BLOCK2)
→
ADC2_MODE2_D2 (BLOCK2)
→
ADC2_MODE3_D2 (BLOCK2)
→
ADC1_MODE0_D1 (BLOCK2)
→
ADC1_MODE1_D1 (BLOCK2)
→
ADC1_MODE2_D1 (BLOCK2)
→
ADC1_MODE3_D1 (BLOCK2)
→
ADC2_MODE0_D1 (BLOCK2)
→
ADC2_MODE1_D1 (BLOCK2)
→
ADC2_MODE2_D1 (BLOCK2)
→
ADC2_MODE3_D1 (BLOCK2)
→
Config fuses:
DIS_RTC_RAM_BOOT (BLOCK0)
→
DIS_ICACHE (BLOCK0)
→
DIS_DCACHE (BLOCK0)
→
DIS_DOWNLOAD_ICACHE (BLOCK0)
Download mode
→
DIS_DOWNLOAD_DCACHE (BLOCK0)
Download mode
→
DIS_FORCE_DOWNLOAD (BLOCK0)
Download mode
→
DIS_CAN (BLOCK0)
hardware
→
DIS_BOOT_REMAP (BLOCK0)
to ROM address sp = False R/W (0b0)
→
FLASH_TPUW (BLOCK0)
after SoC power-up, = 0 R/W (0x0)
→
15, delay is 7.
→
DIS_LEGACY_SPI_BOOT (BLOCK0)
→
UART_PRINT_CHANNEL (BLOCK0)
printing boot msg
→
Espressif Systems
= -9.200000000000001 R/W (0b101011100)
= -28 R/W (0x87)
= -28 R/W (0x87)
= -28 R/W (0x87)
= -24 R/W (0x86)
= 12 R/W (0x03)
= 8 R/W (0x02)
= 12 R/W (0x03)
= 16 R/W (0x04)
= -20 R/W (0b100101)
= -12 R/W (0b100011)
= -12 R/W (0b100011)
= -4 R/W (0b100001)
= -12 R/W (0b100011)
= -8 R/W (0b100010)
= -8 R/W (0b100010)
= -4 R/W (0b100001)
= False R/W (0b0)
= False R/W (0b0)
= False R/W (0b0)
= False R/W (0b0)
= False R/W (0b0)
= False R/W (0b0)
= False R/W (0b0)
= False R/W (0b0)
= UART0 R/W (0b0)
811
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(continued from previous page)
Temperature calibration
ADC1 calibration 1
ADC1 calibration 2
ADC1 calibration 3
ADC1 calibration 4
ADC2 calibration 5
ADC2 calibration 6
ADC2 calibration 7
ADC2 calibration 8
ADC1 calibration 9
ADC1 calibration 10
ADC1 calibration 11
ADC1 calibration 12
ADC2 calibration 13
ADC2 calibration 14
ADC2 calibration 15
ADC2 calibration 16
Disables boot from RTC RAM
Disables ICache
Disables DCache
Disables Icache when SoC is
Disables Dcache when SoC is
Disables forcing chip
Disables the TWAI
Controller␣
Disables capability to Remap
ace
Configures flash startup
unit is (ms/2). When the value
5 ms
Disables Legacy SPI boot mode
Selects the default UART
␣
␣
␣
␣
␣
␣
␣
␣
␣
␣
␣
␣
␣
␣
␣
␣
␣
␣
␣
␣
in␣
in␣
into␣
RAM␣
delay␣
is␣
␣
for␣
(continues on next page)
Release v4.4
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