Chapter 2. API Reference
Overview
The spi_flash component contains API functions related to reading, writing, erasing, memory mapping for data in
the external flash. The spi_flash component also has higher-level API functions which work with partitions defined
in the
partition
table.
Different from the API before IDF v4.0, the functionality of esp_flash_* APIs is not limited to the"main" SPI flash
chip (the same SPI flash chip from which program runs). With different chip pointers, you can access to external
flash chips connected to not only SPI0/1 but also other SPI buses like SPI2.
Note: Instead of through the cache connected to the SPI0 peripheral, most esp_flash_* APIs go through other SPI
peripherals like SPI1, SPI2, etc.. This makes them able to access to not only the main flash, but also external flash.
However due to limitations of the cache, operations through the cache are limited to the main flash. The address
range limitation for these operations are also on the cache side. The cache is not able to access external flash chips
or address range above its capabilities. These cache operations include: mmap, encrypted read/write, executing code
or access to variables in the flash.
Note: Flash APIs after IDF v4.0 are no longer atomic. A writing operation during another on-going read operation,
on the overlapped flash address, may cause the return data from the read operation to be partly same as before, and
partly updated as new written.
Kconfig option
CONFIG_SPI_FLASH_USE_LEGACY_IMPL
to the implementation before ESP-IDF v4.0. However, the code size may get bigger if you use the new API and the
old API at the same time.
Encrypted reads and writes use the old implementation, even if
enabled. As such, encrypted flash operations are only supported with the main flash chip (and not with other flash
chips, that is on SPI1 with different CS, or on other SPI buses). Reading through cache is only supported on the main
flash, which is determined by the HW.
Support for features of flash chips
Flash features of different vendors are operated in different ways and need special support. The fast/slow read and
Dual mode (DOUT/DIO) of almost all 24-bits address flash chips are supported, because they don't need any
vendor-specific commands.
Quad mode (QIO/QOUT) is supported on following chip types:
1. ISSI
2. GD
3. MXIC
4. FM
5. Winbond
6. XMC
7. BOYA
The 32-bit address range of following chip type is supported:
1. W25Q256
2. GD25Q256
Users can also customize their own flash chip driver, see
Warning: Customizing SPI Flash Chip Drivers is considered an "expert"feature. Users should only do so at
their own risk. (See the notes below)
Espressif Systems
can be used to switch spi_flash_* functions back
CONFIG_SPI_FLASH_USE_LEGACY_IMPL
Overriding Default Chip Drivers
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