Alinx Z19 User Manual page 13

PS Side DDR4 DRAM pin assignment:
Signal Name
PS_DDR4_DQS0_N
PS_DDR4_DQS0_P
PS_DDR4_DQS1_N
PS_DDR4_DQS1_P
PS_DDR4_DQS2_N
PS_DDR4_DQS2_P
PS_DDR4_DQS3_N
PS_DDR4_DQS3_P
PS_DDR4_DQS4_N
PS_DDR4_DQS4_P
PS_DDR4_DQS5_N
PS_DDR4_DQS5_P
PS_DDR4_DQS6_N
PS_DDR4_DQS6_P
PS_DDR4_DQS7_N
PS_DDR4_DQS7_P
PS_DDR4_DQ0
PS_DDR4_DQ1
PS_DDR4_DQ2
PS_DDR4_DQ3
PS_DDR4_DQ4
PS_DDR4_DQ5
PS_DDR4_DQ6
www.alinx.com
Pin Name
PS_DDR_DQS_N0_504
PS_DDR_DQS_P0_504
PS_DDR_DQS_N1_504
PS_DDR_DQS_P1_504
PS_DDR_DQS_N2_504
PS_DDR_DQS_P2_504
PS_DDR_DQS_N3_504
PS_DDR_DQS_P3_504
PS_DDR_DQS_N4_504
PS_DDR_DQS_P4_504
PS_DDR_DQS_N5_504
PS_DDR_DQS_P5_504
PS_DDR_DQS_N6_504
PS_DDR_DQS_P6_504
PS_DDR_DQS_N7_504
PS_DDR_DQS_P7_504
PS_DDR_DQ0_504
PS_DDR_DQ1_504
PS_DDR_DQ2_504
PS_DDR_DQ3_504
PS_DDR_DQ4_504
PS_DDR_DQ5_504
PS_DDR_DQ6_504
Z19 User Manual
Pin Number
BA30
AY30
AY33
AY32
AT30
AR30
AT32
AR32
AR40
AP40
AK37
AJ37
AU41
AU40
AL41
AL40
AV29
AW30
AW29
AW31
BB31
BB30
BB29
13 /
74