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CT 9000 ® ADV
memory can be read or written in the same manner as static RAM.
U13 is used as the upper 8 bits of a 16-bit wide RAM address
range.
RAM Operation
The Static RAM, U12, is socketed so that it can handle any JEDEC
standard 32K x 8-bit RAM.
Timing constraints require that the RAM
speed be 100ns or faster.
Note that the chip select line is tied to
the output enable line, which means that the outputs will be en-
abled for both reads and writes.
However, during a write operation,
the output enable is a "don't care" input. U12 is used as the lower
8-bits of a 16-bit wide RAM address range.
EPROM Operation
Any JEDEC standard 32K x 8-bit EPROM may be used for the two
EPROM, U14 and U16.
Timing constraints require that the
EPROM speed be 55ns or faster. The CPU system will boot from
EPROM U16 as this contains the main console program.
EPROM
U14 contains the fonts and must also be present.
Table 3-10. Hardware Summary
U#
Description
Data | Address;
Chip | IRQ
Lines
Lines | Select
11
| EPROM
PD0-PD15 | A1-A18
6-10
7
12
| EPROM-Lang.
PDO-PD7
| A1-A15
1
13
¡UART
PDO-PD15
|A1-A15
2
1,2
14
| EPROM
PDO-PD15 | A0-A14
4
15
| EPROM
PDO-PD15 | A0-A14
3
16
|EPROM
PDO-PD15 | A0-A14
BOOT
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