Analog Devices AD7194 Manual page 34

8-channel, 4.8 khz, ultralow noise, 24-bit sigma-delta adc with pga
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AD7194
Continuous Conversion Mode
Continuous conversion is the default power-up mode. The
AD7194 converts continuously, and the RDY bit in the status
register goes low each time a conversion is complete. If CS is
low, the DOUT/ RDY line also goes low when a conversion is
completed. To read a conversion, the user writes to the commu-
nications register, indicating that the next operation is a read of
the data register. When the data-word has been read from the
data register, DOUT/ RDY goes high. The user can read this
CS
DIN
DOUT/RDY
SCLK
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register additional times, if required. However, the user must
ensure that the data register is not being accessed at the com-
pletion of the next conversion or else the new conversion word
is lost.
If the DAT_STA bit in the mode register is set to 1, the contents
of the status register are output along with the conversion each
time that the data read is performed. The status register indi-
cates the channel to which the conversion corresponds.
0x58
DATA
Figure 25. Continuous Conversion
Rev. 0 | Page 34 of 56
0x58
DATA

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