Digital Outputs (Out0, Out2/Error, Out3/ Ready); Digital Hall Inputs (Hall1, Hall2, Hall3); Analog 0 - Technosoft iPOS3602 BX-CAN Technical Reference

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3.7.9

Digital Outputs (OUT0, OUT2/Error, OUT3/ Ready)

Mode compliance
Default state
Output voltage
Output current
Minimum pulse width
ESD protection

3.7.10 Digital Hall Inputs (Hall1, Hall2, Hall3)

Mode compliance
Default state
Input voltage
Input current
Minimum pulse width
ESD protection
3.7.11 Analog 0..5V Input (REF/FDBK)
Input voltage
Input impedance
Resolution
Integral linearity
Differential linearity
Offset error
Gain error
Bandwidth (-3dB)
ESD protection
1
"FS" stands for "Full Scale"
 Technosoft 2022
All outputs (OUT0, OUT2/Error, OUT3/Ready)
Not supplied (+V
floating or to GND)
LOG
OUT0
Immediately after
power-up
OUT2/Error, OUT3/ Ready
OUT0, OUT2/Error
Normal operation
OUT3/Ready
Logic "LOW"; output current = 0.5A
Logic "HIGH"; output current = 0, no
load
Logic "HIGH", external load to +V
Absolute maximum, continuous
Absolute maximum, surge (duration ≤ 1s)
Logic "LOW", sink current, continuous
Logic "LOW", sink current, pulse ≤ 5 sec.
Logic "HIGH", source current; external
load to GND; V
>= 2.0V
OUT
Logic "HIGH", leakage current; external load to +V
V
max = 40V
LOG
Human body model
Input floating (wiring disconnected)
Logic "LOW"
Logic "HIGH"
Floating voltage (not connected)
Absolute maximum, surge (duration ≤ 1s)
Logic "LOW"; Pull to GND
Logic "HIGH"; Internal 4.7KΩ pull-up to +5
Human body model
Operational range
Absolute maximum values, continuous
Absolute maximum, surge (duration ≤ 1s)
To GND
No missing codes
Assuming parameter RFOFFSET=0
Assuming parameter RFGAIN=0x7EB8 (32440)
Software selectable
Human body model
36
OUT2/Error,
OUT3/ Ready
OUT0
LOG
OUT2/Error,
OUT3/ Ready
OUT0, OUT1
; V
=
LOG
OUT
0..5V mode
iPOS360x BX-CAN Technical Reference
Min.
Typ.
Max.
TTL / CMOS / Open-collector / NPN 24V
High-Z (floating)
Logic "HIGH"
Logic "LOW"
Logic "HIGH"
Logic "LOW"
0.2
0.8
2.9
3
3.3
4
4.5
5
V
LOG
-0.5
V
+0.5
LOG
-1
V
+1
LOG
0.5
1
2
4
0.1
0.2
2
±5
Min.
Typ.
Max.
TTL / CMOS / Open-collector
Logic HIGH
0
0.8
2
5
4.4
-10
+15
1.2
0
0
0
2
±5
Min.
Typ.
Max.
0
4.95
-12
+18
±36
30
12
±4
±1
±4
±24
±1.5%
±4%
0
1
±2
Units
V
A
A
mA
mA
µs
kV
Units
V
mA
µs
kV
Units
V
bits
bits
bits
bits
1
% FS
kHz
kV

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