System Memory; High-Speed Interface Overview - Kontron COMh-sdID User Manual

applies. DTR is the maximum temperature swing the I/Os can sustain without re-training.
The DTR is defined as the absolute value of the training DTS temperature minus current
DTS temperature. The max DTR value depends on various I/O configurations.
By default the DTR-value is 90°C. Within Tjunction limits the max. temperature range
during operation is +-90°C starting from boot time temperature.
For more details please see Intel document #631107 and/or contact

3.3.6 System Memory

The COMh-sdID offers 4x DIMM sockets supporting up to 64 GByte of RDIMM ECC memory per socket.
Socket 288-pin
Memory Type Registered ECC DIMM 1.2V
Memory Speed 3200 MTs (max)
Channels Four channels
Max Memory Up to 256GByte (4x 64GByte)
Table 10: System Memory

3.3.7 High-Speed Interface Overview

The integrated SoC PCH supports 24x HSIO lanes #0-23 (HSIO) which can be configured as PCIe Gen
3.0 lanes with up to 3 RPC (Root Port Controller), 4 RP (Root Port) per RPC (12 RPs max). The HSIO
PCIe lanes are partly multiplexed with USB3.0 and SATA.
The HSIO lanes #0 - #15 are used as PCIe Gen 3.0 lanes to support COM-HPC J1 Group 0 PCIe #0 -15.
The HSIO lane #16 is used as PCIe Gen 3.0 lane for the onboard 1 /2.5 GbE Controller Intel i226.
The HSIO lane #17 and #19 are defined as SATA.
The HSIO lane #18 is used as PCIe Gen 3.0 lane for an optional onboard NVMe SSD.
The HSIO lanes #20, #21 and #23 are defined as USB3.0.
The HSIO lane #22 is defined as USB 3.0 for USB #3 - as a BOM option the HSIO lane #22 can be
defined as 1x PCIe Gen 3.0 lane for a BMC controller on the carrier board.
HSIO Lane# PCIe Gen 3.0 USB 3.0
0 PCIe 0 -
1 PCIe 1 -
2 PCIe 2 -
3 PCIe 3 -
4 PCIe 4 -
5 PCIe 5 -
6 PCIe 6 -
7 PCIe 7 -
8 PCIe 8 -
9 PCIe 9 -
10 PCIe 10 -
11 PCIe 11 -
12 PCIe 12 -
13 PCIe 13 -
14 PCIe 14 -
15 PCIe 15 -
www.kontron.com
SATA Description
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- COM-HPC Connector - Group 0 low - PCIe Gen 3
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- COM-HPC Connector - Group 0 high - PCIe Gen 3
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