Description Of Device Limitations; Usart; Start Bit Detected Too Soon When Sampling For Nack Signal From; The Smartcard - ST STM32F038 6 Series Errata Sheet

Description of device limitations

2 Description of device limitations
The following sections describe device limitations and provide workarounds if available.
They are grouped by device functions.
2.1

USART

2.1.1

Start bit detected too soon when sampling for NACK signal from

the smartcard

Description
In the ISO7816, when a character parity error is incorrect, the smartcard receiver shall
transmit a NACK error signal at (10.5 +/- 0.2) etu after the character START bit falling edge.
In this case, the USART transmitter should be able to detect correctly the NACK signal by
sampling at (11.0 +/-0.2) etu after the character START bit falling edge.
The USART peripheral used in smartcard mode doesn't respect the (11 +/-0.2) etu timing,
and when the NACK falling edge arrives at 10.68 etu or later, the USART might misinterpret
this transition as a START bit even if the NACK is correctly detected.
Workaround
None
2.1.2

Break request can prevent the Transmission Complete flag (TC)

from being set

Description
After the end of transmission of a data (D1), the Transmission Complete (TC) flag will not be
set in the following conditions:
•
CTS hardware flow control is enabled.
•
D1 is being transmitted.
• A break transfer is requested before the end of D1 transfer.
•
nCTS is de-asserted before the end of transfer of D1.
Workaround
If the application needs to detect the end of transfer of the data, the break request should be
done after making sure that the TC flag is set.
2.1.3

nRTS is active while RE or UE = 0

Description
The nRTS line is driven low as soon as RTSE bit is set even if the USART is disabled (UE =
0 or the receiver is disabled (RE = 0) i.e. not ready to receive data.
6/21 DocID026423 Rev 2
STM32F038x6