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5.1
Debug connectors
This section describes the MPS2 and MPS2+ board connectors that support P-JTAG processor debug, F-
JTAG FPGA debug, 16-bit Trace, 4-bit Trace, and SWD. This section describes the connectors and lists
their signals.
This section contains the following subsections:
•
5.1.1 JTAG 14 connector on page
•
5.1.2 JTAG 20 connector on page
•
5.1.3 CoreSight 10 connector on page
•
5.1.4 CoreSight 20 connector on page
•
5.1.5 MICTOR 38 connector on page
5.1.1
JTAG 14 connector
The MPS2 and MPS2+ FPGA Prototyping Boards provide one F-JTAG, ILA, connector that supports
FPGA debug. It enables you to connect an ILA device, such as SignalTap II, to a hard FPGA JTAG chain
in the FPGA and debug your design.
The JTAG 14 connector connects to general‑purpose pins on the FPGA. The availability of F-JTAG
depends on the design which you implement in the FPGA. The MPS2 and MPS2+ FPGA Prototyping
Boards label this connector as FJTAG.
The following figure shows the JTAG 14 connector.
The following table shows the F-JTAG connector pin mapping for each ILA signal on the JTAG 14
connector J24.
•
Pins 4, 8 and 10 have pullup resistors to 3V.
•
Pin 6 has a pulldown resistor to GND.
Related information
2.15.2 F-JTAG on page 2-44
1.3 Location of components on the MPS2 FPGA Prototyping Board on page 1-17
1.4 Location of components on the MPS2+ FPGA Prototyping Board on page 1-19
100112_0200_09_en
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5-76.
Note
Copyright © 2013–2016, 2018–2020 Arm Limited or its affiliates. All
rights reserved.
Non-Confidential
5-76.
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Table 5-1 JTAG 14 connector, J24, signal list
5 Signal Descriptions
5.1 Debug connectors
2
14
1
13
Figure 5-1 JTAG 14 connector
Pin Signal Pin Signal
1
GND
2
+3V_EXT
3
GND
4
FPGA_TMS
5
GND
6
FPGA_TCK
7
GND
8
FPGA_TDO
9
GND
10
FPGA_TDI
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