Ddr3 Sdram; Ddr3 Sdram Type; Signal Description; Ddr3 Sdram Types - Enclustra Mars AX3 User Manual

Signal Name FPGA Pin
LED0# M16
LED1# M17
LED2# L18
LED3# M18
Table 17: LEDs
2.14

DDR3 SDRAM

The DDR3 SDRAM on the Mars AX3 FPGA module is operated at 1.35 V (low power mode) or at 1.5 V, de-
pending on a selection signal. The DDR bus width is 16-bit.
The maximum memory bandwidth on the Mars AX3 FPGA module is:
800 Mbit/sec 16 bit = 1600 MB/sec
For DDR3 low power mode (DDR3L) the speed can be lower than mentioned above. Details are available in
the Artix-7 FPGAs DC and AC Switching Characteristics document [19].
2.14.1

DDR3 SDRAM Type

Table 18 describes the memory availability and configuration on the Mars AX3 FPGA module.
Module
MA-AX3-D8 (commercial)
MA-AX3-D8 (commercial)
MA-AX3-D8 (industrial)
MA-AX3-D8 (industrial)
Table 18: DDR3 SDRAM Types
Warning!
Other DDR3 memory devices may be equipped in future revisions of the Mars AX3 FPGA module. Please
check the user manual regularly for updates. Any parts with different speed bins or temperature ranges
that fulfill the requirements for the module variant may be used.
2.14.2

Signal Description

Please refer to the Mars AX3 FPGA Module FPGA Pinout Excel Sheet [4] for detailed information on the
DDR3 SDRAM connections.
D-0000-426-004
Remarks
User function/active-low
User function/active-low
User function/active-low
User function/active-low
SDRAM Type
MT41K128M16JT-125:K
NT5CC128M16IP-DI
MT41K128M16JT-125 IT:K
NT5CC128M16IP-DII
24 / 47
Density Configuration
2 Gbit 128 M 16 bit
2 Gbit 128 M 16 bit
2 Gbit 128 M 16 bit
2 Gbit 128 M 16 bit
Manufact.
Micron
Nanya
Micron
Nanya
Version 06, 16.02.2021