Hitachi Relion 650 Series Technical Manual page 381

1MRK 511 557-UEN Rev. A
Design of the time system (clock synchronization)
synchronization
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Figure 166: Design of time system (clock synchronization)
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical structure. A function is
synchronized from a higher level and provides synchronization to lower levels.
Synchronization from
Optional synchronization of
modules at a lower level
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Figure 167: Synchronization principle
A function is said to be synchronized when it periodically receives synchronization messages from a
higher level. As the level decreases, the accuracy of the synchronization decreases as well. A
function can have several potential sources of synchronization, with different maximum errors. This
gives the function the possibility to choose the source with the best quality, and to adjust its internal
clock after this source. The maximum error of a clock can be defined as:
• The maximum error of the last used synchronization message
• The time since the last used synchronization message
• The rate accuracy of the internal clock in the function.
Technical Manual
External
sources
Off
SNTP
Time-regulator
IRIG - B
Off
IRIG - B
Time-regulator
PPS
(fast or slow)
a higher level
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Time tagging and general synchronization
Events
Communication
SW-time
Synchronization for different protection
(ECHO-mode or GPS)
HW-time
A/D
Converter
Function
IEC09000342-1-en.vsd
Basic IED functions
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Protection and
control
functions
Transducers*
*IEC 61850-9-2
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Section 14
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