Detailed Information About Processor Clock Rates - HP 16600A Series User Manual

Chapter 6: Connecting and Configuring the Emulation Module
Configuring the Emulation Module
Detailed information about processor clock
rates
Most target systems will communicate with the emulator properly and
with excellent performance following the basic guidelines given in the
preceding sections. In some target systems, the setting of this
parameter requires greater knowledge of the actual clock generation
model.
The CPU32 family has two major use models for the processor clock
rate which can be used to support the majority of target systems. When
using the internal clock synthesizer, the processor will run from reset
at a Motorola defined default clock rate which, when using the
Motorola recommended crystal is usually 8.38 MHz or 1/2 of the
maximum clock rate of the processor. The programmer's initialization
code then programs the clock synthesizer to run at the desired clock
rate which is usually higher than the default. The second model uses an
external clock source to directly control the processor clock rate. The
emulator directly supports both processor clock rate models. Users
that use a different clock rate model can examine the support of these
models to determine the correct settings for supporting their processor
clock rate.
The emulator supports the use model of the target processor clock rate
being increased through the configuration. When applying the
configuration at the start of a user interface or through the
configuration process, the emulator communicates with the target
processor at a rate based on the default processor clock rate (either 8
MHz or 131 kHz). At this default rate, it copies the EMSYNCR
(EMulator copy of the SYNthesizer Control Register) to the SYNCR
(SYNthesizer Control Register). The emulator then changes its
communications rate to the maximum rate that the processor clock
rate specified in the configuration can support.
Resetting the target processor also resets the SYNCR to its default
value. If the target processor is reset while running user code (as
opposed to putting the processor in a reset state from the interface),
no communications rate change takes place within the emulator. The
154 Solutions for CPU32