Table Of Contents - Intel Agilex F Series User Manual

Contents
1. Overview........................................................................................................................ 4
1.1. Block Diagram.......................................................................................................5
1.2. Box Contents........................................................................................................ 6
1.3. Operating Conditions..............................................................................................6
2. Getting Started............................................................................................................... 7
2.1. Software and Driver Installation.............................................................................. 7
2.2. Quick Start Guide.................................................................................................. 7
2.3. Design Examples................................................................................................... 8
3. Power Up the Development Kit....................................................................................... 9
3.1. Default Settings.................................................................................................... 9
3.2. Power Up..............................................................................................................9
3.3. Control on-board clock through Clock Controller GUI................................................ 10
3.4. Control on-board power regulator through Power GUI............................................... 12
4. Board Test System........................................................................................................ 13
4.1. Test the functionality of the Development Kit........................................................... 13
4.1.1. The Configure Menu................................................................................. 13
4.1.2. The Sys Info Tab...................................................................................... 14
4.1.3. The GPIO Tab.......................................................................................... 15
4.1.4. The QSFPDD Tab......................................................................................16
4.1.5. The DDR4-0 Tab...................................................................................... 19
4.1.6. The DDR4-2 Tab...................................................................................... 21
4.1.7. The DDR4-3 Tab...................................................................................... 22
4.2. BTS Test Areas.................................................................................................... 24
4.3. Identify Test Pass/Fail based on BTS GUI test status................................................. 24
5. Development Kits Hardware and Configuration.............................................................25
5.1. Configure the FPGA and access HPS Debug Access Port by JTAG.................................25
5.2. Configure the FPGA device by AS modes (Default Mode)........................................... 26
6. Custom Projects for the Development Kit..................................................................... 27
6.1. Add SmartVID settings in the QSF file.....................................................................27
6.2. Golden Top......................................................................................................... 27
7. Revision History............................................................................................................ 28
A. Development Kit Components....................................................................................... 29
A.1. Intel Agilex FPGA................................................................................................. 29
A.2. Configuration Support.......................................................................................... 29
A.2.1. JTAG Chain and Header............................................................................ 29
A.2.2. On-board Intel FPGA Download Cable II .....................................................30
A.3. Clocks................................................................................................................ 31
A.4. Memory Interfaces...............................................................................................32
A.5. Transceiver Interfaces.......................................................................................... 32
A.6. HPS Interface......................................................................................................32
A.7. General Input and Output..................................................................................... 33
A.7.1. Switches.................................................................................................33
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Intel Agilex F-Series FPGA Development Kit User Guide
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